On 6 October 2015 at 13:27, Harvey Hunt <harvey.hunt@xxxxxxxxxx> wrote:
> From: Alex Smith <alex.smith@xxxxxxxxxx>
>
> Add device tree nodes for the NEMC and BCH to the JZ4780 device tree,
> and make use of them in the Ci20 device tree to add a node for the
> board's NAND.
>
> Note that since the pinctrl driver is not yet upstream, this includes
> neither pin configuration nor busy/write-protect GPIO pins for the
> NAND. Use of the NAND relies on the boot loader to have left the pins
> configured in a usable state, which should be the case when booted
> from the NAND.
>
> Signed-off-by: Alex Smith <alex.smith@xxxxxxxxxx>
> Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@xxxxxxxxxx>
> Cc: David Woodhouse <dwmw2@xxxxxxxxxxxxx>
> Cc: Brian Norris <computersforpeace@xxxxxxxxx>
> Cc: Paul Burton <paul.burton@xxxxxxxxxx>
> Cc: linux-mtd@xxxxxxxxxxxxxxxxxxx
> Cc: devicetree@xxxxxxxxxxxxxxx
> Cc: linux-kernel@xxxxxxxxxxxxxxx
> Cc: linux-mips@xxxxxxxxxxxxxx
> Cc: Alex Smith <alex@xxxxxxxxxxxxxxxx>
> Signed-off-by: Harvey Hunt <harvey.hunt@xxxxxxxxxx>
> ---
> v6 -> v7:
> - Add nand-ecc-mode to DT.
> - Add nand-on-flash-bbt to DT.
>
> v4 -> v5:
> - New patch adding DT nodes for the NAND so that the driver can be
> tested.
>
> arch/mips/boot/dts/ingenic/ci20.dts | 54 ++++++++++++++++++++++++++++++++++
> arch/mips/boot/dts/ingenic/jz4780.dtsi | 26 ++++++++++++++++
> 2 files changed, 80 insertions(+)
>
> diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts
> index 9fcb9e7..453f1d3 100644
> --- a/arch/mips/boot/dts/ingenic/ci20.dts
> +++ b/arch/mips/boot/dts/ingenic/ci20.dts
> @@ -42,3 +42,57 @@
> &uart4 {
> status = "okay";
> };
> +
> +&nemc {
> + status = "okay";
> +
> + nand: nand@1 {
> + compatible = "ingenic,jz4780-nand";
> + reg = <1 0 0x1000000>;
> +
Why is this in the ci20.dts instead of the SoC dtsi?
Seems at least compatible and reg is not board-specific.
Thanks,
--
Ezequiel García, VanguardiaSur
www.vanguardiasur.com.ar
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