On 10/07, Gabriel Fernandez wrote: > Change A9 PLL rate, as per requirement from the cpufreq framework, > for DVFS. For rate change, the A9 clock needs to be temporarily sourced > from PLL external to A9 and then sourced back to A9-PLL > > Signed-off-by: Pankaj Dev <pankaj.dev@xxxxxx> > Signed-off-by: Gabriel Fernandez <gabriel.fernandez@xxxxxxxxxx> > --- Applied to clk-next -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
