Hi Rob, > Sent: Tuesday, October 06, 2015 12:39 AM > > On Wed, Sep 30, 2015 at 3:47 AM, Yoshihiro Shimoda > <yoshihiro.shimoda.uh@xxxxxxxxxxx> wrote: > > Add binding document for Renesas PWM Timer on R-Car SoCs. > > > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx> > > Acked-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx> > > Reviewed-by: Simon Horman <horms+renesas@xxxxxxxxxxxx> > > --- > > .../devicetree/bindings/pwm/renesas,pwm-rcar.txt | 27 ++++++++++++++++++++++ > > 1 file changed, 27 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt > > > > diff --git a/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt > b/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt > > new file mode 100644 > > index 0000000..ea0a27b > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt > > @@ -0,0 +1,27 @@ > > +* Renesas R-Car PWM Timer Controller > > + > > +Required Properties: > > +- compatible: should be one of the following. > > + - "renesas,pwm-rcar": for generic R-Car compatible PWM Timer > > Should be this one and one of the following? That is what the example shows. Thank you for the point. Since this patch is already merged in linux-pwm repository, I will submit a new patch to revise it. Best regards, Yoshihiro Shimoda > > + - "renesas,pwm-r8a7778": for R-Car M1A > > + - "renesas,pwm-r8a7779": for R-Car H1 > > + - "renesas,pwm-r8a7790": for R-Car H2 > > + - "renesas,pwm-r8a7791": for R-Car M2-W > > + - "renesas,pwm-r8a7794": for R-Car E2 > > +- reg: base address and length of the registers block for the PWM. > > +- #pwm-cells: should be 2. See pwm.txt in this directory for a description of > > + the cells format. > > +- clocks: clock phandle and specifier pair. > > +- pinctrl-0: phandle, referring to a default pin configuration node. > > +- pinctrl-names: Set to "default". > > + > > +Example: R8A7790 (R-Car H2) PWM Timer node > > + > > + pwm0: pwm@e6e30000 { > > + compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar"; > > + reg = <0 0xe6e30000 0 0x8>; > > + #pwm-cells = <2>; > > + clocks = <&mstp5_clks R8A7790_CLK_PWM>; > > + pinctrl-0 = <&pwm0_pins>; > > + pinctrl-names = "default"; > > + }; > > -- > > 1.9.1 > > ��.n��������+%������w��{.n����z�{��ܨ}���Ơz�j:+v�����w����ޙ��&�)ߡ�a����z�ޗ���ݢj��w�f