On 09/22/2015 11:52 AM, Will Deacon wrote:
On Thu, Sep 17, 2015 at 11:41:34PM +0100, David Daney wrote:
From: David Daney <david.daney@xxxxxxxxxx>
The config space for external PCIe root complexes on some Cavium
ThunderX SoCs is very similar to CAM and ECAM, but differs in the
shift values that have to be applied to the bus and devfn numbers to
compose that address window offset. These root complexes also have
the interesting property that there is no root bridge, so the standard
manner of limiting scanning to only the first device doesn't work. We
can use the standard pci-host-generic driver if we make a minor
addition to handle these differences, so we...
Add a mapping function for ThunderX PCIe root complexes with a bus
shift of 24 and devfn shift of 16. Ignore accesses for devices other
than the first device on the primary bus.
Document the whole thing in devicetree/bindings/pci/host-generic-pci.txt
Signed-off-by: David Daney <david.daney@xxxxxxxxxx>
---
.../devicetree/bindings/pci/host-generic-pci.txt | 8 +++---
drivers/pci/host/pci-host-generic.c | 29 ++++++++++++++++++++++
2 files changed, 34 insertions(+), 3 deletions(-)
Thanks, this looks better now:
Acked-by: Will Deacon <will.deacon@xxxxxxx>
Thanks Will.
Because patches 1/3 and 2/3 will be reworked, I will re-send this as a
stand-alone patch.
David Daney
Will
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