Krzysztof Kozlowski wrote: > > W dniu 13.08.2015 o 18:06, Alexis Ballier pisze: > > SPI1 is available on IO Port #2 (as depicted on their website) in > > PCB Revision 0.5 of Hardkernel Odroid U3 board. > > The shield connects a 256KiB spi-nor flash on that bus. > > > > Signed-off-by: Alexis Ballier <aballier@xxxxxxxxxx> > > > > --- > > > > Changes in v2: Use GPIO_ACTIVE_HIGH (Krzysztof Kozlowski) > > > > arch/arm/boot/dts/exynos4412-odroidu3.dts | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > Thanks for fixing, looks good: > > Reviewed-by: Krzysztof Kozlowski <k.kozlowski@xxxxxxxxxxx> > Applied, thanks. - Kukjin -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
