Define L2 SAW as the power domain provider and individual cpus are the
power domain consumers.
Signed-off-by: Lina Iyer <lina.iyer@xxxxxxxxxx>
---
arch/arm/boot/dts/qcom-apq8084.dtsi | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi
index 900ef1f..4a61f8d 100644
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -23,6 +23,7 @@
qcom,acc = <&acc0>;
qcom,saw = <&saw0>;
cpu-idle-states = <&CPU_SPC>;
+ power-domains = <&saw_l2>;
};
cpu@1 {
@@ -34,6 +35,7 @@
qcom,acc = <&acc1>;
qcom,saw = <&saw1>;
cpu-idle-states = <&CPU_SPC>;
+ power-domains = <&saw_l2>;
};
cpu@2 {
@@ -45,6 +47,7 @@
qcom,acc = <&acc2>;
qcom,saw = <&saw2>;
cpu-idle-states = <&CPU_SPC>;
+ power-domains = <&saw_l2>;
};
cpu@3 {
@@ -56,6 +59,7 @@
qcom,acc = <&acc3>;
qcom,saw = <&saw3>;
cpu-idle-states = <&CPU_SPC>;
+ power-domains = <&saw_l2>;
};
L2: l2-cache {
@@ -183,9 +187,11 @@
};
saw_l2: power-controller@f9012000 {
- compatible = "qcom,apq8084-saw2-v2.1-l2", "qcom,saw2";
+ compatible = "qcom,apq8084-saw2-v2.1-l2", "qcom,saw2",
+ "arm,pd";
reg = <0xf9012000 0x1000>;
regulator;
+ #power-domain-cells = <0>;
};
acc0: clock-controller@f9088000 {
--
2.1.4
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