On 31/07/15 17:00, Mark Rutland wrote:
Hi,
On Thu, Jul 23, 2015 at 12:10:21PM +0100, Sudeep Holla wrote:
This patch adds devicetree binding for System Control and Power
Interface (SCPI) Message Protocol used between the Application Cores(AP)
and the System Control Processor(SCP). The MHU peripheral provides a
mechanism for inter-processor communication between SCP's M3 processor
and AP.
SCP offers control and management of the core/cluster power states,
various power domain DVFS including the core/cluster, certain system
clocks configuration, thermal sensors and many others.
Signed-off-by: Sudeep Holla <sudeep.holla@xxxxxxx>
Cc: Rob Herring <robh+dt@xxxxxxxxxx>
Cc: Mark Rutland <mark.rutland@xxxxxxx>
CC: Jassi Brar <jassisinghbrar@xxxxxxxxx>
Cc: Liviu Dudau <Liviu.Dudau@xxxxxxx>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@xxxxxxx>
Cc: Jon Medhurst (Tixy) <tixy@xxxxxxxxxx>
Cc: devicetree@xxxxxxxxxxxxxxx
---
Documentation/devicetree/bindings/arm/arm,scpi.txt | 151 +++++++++++++++++++++
MAINTAINERS | 6 +
2 files changed, 157 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/arm,scpi.txt
diff --git a/Documentation/devicetree/bindings/arm/arm,scpi.txt b/Documentation/devicetree/bindings/arm/arm,scpi.txt
new file mode 100644
index 000000000000..e21cce646561
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/arm,scpi.txt
@@ -0,0 +1,151 @@
+System Control and Power Interface (SCPI) Message Protocol
+----------------------------------------------------------
+
+Firmware implementing the SCPI described in ARM document number ARM DUI 0922B
+("ARM Compute Subsystem SCP: Message Interface Protocols")[0] can be used
+by Linux to initiate various system control and power operations.
+
+Required properties:
+
+- compatible : should be "arm,scpi"
+- mboxes: List of phandle and mailbox channel specifiers
+ All the channels reserved by remote SCP firmware for use by
+ SCPI message protocol should be specified in any order
+- shmem : List of phandle pointing to the shared memory(SHM) area between the
+ processors using these mailboxes for IPC, one for each mailbox
+ SHM can be any memory reserved for the purpose of this communication
+ between the processors.
+
+See Documentation/devicetree/bindings/mailbox/mailbox.txt
+for more details about the generic mailbox controller and
+client driver bindings.
+
+Clock bindings for the clocks based on SCPI Message Protocol
+------------------------------------------------------------
+
+This binding uses the common clock binding[1].
+
+Container Node
+==============
+Required properties:
+- compatible : should be "arm,scpi-clocks"
+ All the clocks provided by SCP firmware via SCPI message
+ protocol much be listed as sub-nodes under this node.
+
+Sub-nodes
+=========
+Required properties:
+- compatible : shall include one of the following
+ "arm,scpi-dvfs-clocks" - all the clocks that are variable and index based.
+ These clocks don't provide an entire range of values between the
+ limits but only discrete points within the range. The firmware
+ provides the mapping for each such operating frequency and the
+ index associated with it. The firmware also manages the
+ voltage scaling appropriately with the clock scaling.
+ "arm,scpi-variable-clocks" - all the clocks that are variable and provide full
+ range within the specified range. The firmware provides the
+ range of values within a specified range.
+
+Other required properties for all clocks(all from common clock binding):
+- #clock-cells : should be set to 1 as each of the SCPI clocks have multiple
+ outputs.
Could you change this to:
#clock-cells: Should be 1. Contains the Clock ID value used by SCPI
commands.
Changed now.
That will make it clear what value should be used when writing a dts
(the raw value commands use, as opposed to some logical abstraction
thereof).
Agreed.
With that:
Acked-by: Mark Rutland <mark.rutland@xxxxxxx>
Thanks.
Regards,
Sudeep
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