On Mon, Jul 27, 2015 at 6:37 AM, Michael van der Westhuizen <michael@xxxxxxxxxxxxxxxx> wrote: > This change documents a new property for the snps,dw-apb-ssi device, > allowing an implementer to specify either four byte or two bytes > access to the SPI controller data register. > > This supports a change that unbreaks this driver on picoXcell > platforms. > > Signed-off-by: Michael van der Westhuizen <michael@xxxxxxxxxxxxxxxx> > --- > > Changes in v2: > - Incorporate review feedback from Andy Shevchenko, reworking the > bindings to reflect common practice. > > Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt > index bd99193..b4f1086 100644 > --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt > +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt > @@ -10,6 +10,8 @@ Required properties: > Optional properties: > - cs-gpios : Specifies the gpio pis to be used for chipselects. > - num-cs : The number of chipselects. If omitted, this will default to 4. > +- snps,reg-io-width : The I/O register width (in bytes) implemented by > + this device. Supported values are 2 or 4 (the default). Drop the snps as this is already a common property (at least for UARTs). Rob -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html