On 11/06/2015 at 18:20:14 +0200, Cyrille Pitchen wrote : > This patch adds a new DT property, "atmel,fifo-size", to enable and set > the maximum number of data the RX and TX FIFOs can store on FIFO capable > USARTs. > > Please be aware that the VERSION register can not be used to guess the > size of FIFOs. Indeed, for a given hardware version, the USARTs can be > integrated on Atmel SoCs with different FIFO sizes. Also the > "atmel,fifo-size" property is optional as older USARTs don't embed FIFO at > all. > > Besides, the FIFO size can not be read or guessed from other registers: > When designing the FIFO feature, no dedicated registers were added to > store this size. Unsed spaces in the I/O register range are limited and > better reserved for future usages. Instead, the FIFO size of each > peripheral is documented in the programmer datasheet. > > Finally, on a given SoC, there can be several instances of USART with > different FIFO sizes. This explain why we'd rather use a dedicated DT > property than use the "compatible" property. > > Signed-off-by: Cyrille Pitchen <cyrille.pitchen@xxxxxxxxx> Acked-by: Alexandre Belloni <alexandre.belloni@xxxxxxxxxxxxxxxxxx> -- Alexandre Belloni, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
