On Friday 29 May 2015 16:04:34 Loc Ho wrote:
> +static void xgene_edac_soc_check(struct edac_device_ctl_info *edac_dev)
> +{
> + struct xgene_edac_dev_ctx *ctx = edac_dev->pvt_info;
> + static const char * const mem_err_ip[] = {
> + "10GbE0",
> + "10GbE1",
> + "Security",
> + "SATA45",
> + "SATA23/ETH23",
> + "SATA01/ETH01",
> + "USB1",
> + "USB0",
> + "QML",
> + "QM0",
> + "QM1 (XGbE01)",
> + "PCIE4",
This list seems a little too hardware specific, I'd assume that the numbers
get a different meaning with the xgene2.
Arnd
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