On Fri, May 29, 2015 at 11:49:54AM -0700, Mathieu Olivari wrote: > On Fri, May 29, 2015 at 04:00:01AM +0200, Andrew Lunn wrote: > > FYI: > > > > I have patches which allow DSA to use two cpu interfaces. Seems to > > work on my DIR665 with a Marvell Switch. > > > > I will post the patches as an RFC. > > > > Andrew > > Does it require the switch CPU ports to support LAG or is it generic > enough to allow switch partitioning? When using tags, DSA by default partitions the switch. Each user port is separate from other ports. lan4 will not bridge to lan1 unless you either do it in software, or you implement the .port_join_bridge/.port_leave_bridge/.port_stp_update methods of dsa_switch_driver. What it requires is that for each user port, you can configure what cpu port it should use. Marvell devices have this ability, and at a first look, it seems like SF2 does as well, but i will leave Florian to answer definitively. I will be posting an RFC patchset later today. Andrew -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
