On Fri, Mar 21, 2025 at 04:14:43PM +0400, George Moussalem via B4 Relay wrote: > From: Nitheesh Sekar <quic_nsekar@xxxxxxxxxxx> > > Add phy and controller nodes for a 2-lane Gen2 and > a 1-lane Gen2 PCIe bus. IPQ5018 has 8 MSI SPI interrupts and > one global interrupt. > > Signed-off-by: Nitheesh Sekar <quic_nsekar@xxxxxxxxxxx> > Signed-off-by: Sricharan R <quic_srichara@xxxxxxxxxxx> > Signed-off-by: George Moussalem <george.moussalem@xxxxxxxxxxx> > --- > arch/arm64/boot/dts/qcom/ipq5018.dtsi | 234 +++++++++++++++++++++++++++++++++- > 1 file changed, 232 insertions(+), 2 deletions(-) > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxxxxxxxx> -- With best wishes Dmitry
