The Marvell xenon-sdhci block can be cache-coherent and needs the
"dma-coherent" property. It can also be behind an IOMMU and needs the
"iommus" property.
Signed-off-by: Rob Herring (Arm) <robh@xxxxxxxxxx>
---
Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml b/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml
index 3f48d8292d5b..259f465ea369 100644
--- a/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml
+++ b/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml
@@ -52,9 +52,14 @@ properties:
- const: core
- const: axi
+ dma-coherent: true
+
interrupts:
maxItems: 1
+ iommus:
+ maxItems: 1
+
marvell,pad-type:
$ref: /schemas/types.yaml#/definitions/string
enum:
--
2.47.2
