On 13:22-20250320, Parth Pancholi wrote: > From: Parth Pancholi <parth.pancholi@xxxxxxxxxxx> > > TI J784S4-based devices, such as the AM69 SoC, provide PCIE_REFCLK outputs > from the SoC, which can be used to clock external PCIe endpoint devices. > Each PCIE_REFCLK output is enabled via the corresponding ACSPCIE clock buffer, > with each buffer supporting two PADs to provide reference clocks for two > associated PCIe instances. The mappings are as follows: > - PCIe0 -> ACSPCIE1 PAD0 > - PCIe1 -> ACSPCIE0 PAD0 > - PCIe2 -> ACSPCIE1 PAD1 > - PCIe3 -> ACSPCIE0 PAD1 > > This patch enables each ACSPCIE module and its corresponding PADs to ensure > that all PCIE_REFCLK outputs are functional. > > This change have been tested on an AM69-based custom hardware platform, > where all four PCIe instances (PCIe0, PCIe1, PCIe2, and PCIe3) with the > internal PCIE_REFCLK are utilized with various endpoint devices such as > a WiFi card, NVMe SSD, and PCIe-to-USB bridge. > > Link: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1484211/am69-pcie-refclk-out-and-acspcie-mappings > Signed-off-by: Parth Pancholi <parth.pancholi@xxxxxxxxxxx> > --- > This change depends on https://lore.kernel.org/all/20241209085157.1203168-1-s-vadapalli@xxxxxx/ > --- > .../boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi | 10 ++++++++-- > arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 10 ++++++---- > 2 files changed, 14 insertions(+), 6 deletions(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi > index 591609f3194c..854fdf7b771e 100644 > --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi > @@ -132,6 +132,11 @@ acspcie0_proxy_ctrl: clock-controller@1a090 { > compatible = "ti,j784s4-acspcie-proxy-ctrl", "syscon"; > reg = <0x1a090 0x4>; > }; > + > + acspcie1_proxy_ctrl: clock-controller@1a094 { > + compatible = "ti,j784s4-acspcie-proxy-ctrl", "syscon"; We have the same challenge with bindings as well? > + reg = <0x1a094 0x4>; > + }; > }; > > main_ehrpwm0: pwm@3000000 { > @@ -1067,11 +1072,12 @@ pcie0_rc: pcie@2900000 { > interrupts = <GIC_SPI 318 IRQ_TYPE_EDGE_RISING>; > device_type = "pci"; > ti,syscon-pcie-ctrl = <&pcie0_ctrl 0x0>; > + ti,syscon-acspcie-proxy-ctrl = <&acspcie1_proxy_ctrl 0x1>; > max-link-speed = <3>; > num-lanes = <4>; > power-domains = <&k3_pds 332 TI_SCI_PD_EXCLUSIVE>; > - clocks = <&k3_clks 332 0>; > - clock-names = "fck"; > + clocks = <&k3_clks 332 0>, <&serdes1 CDNS_TORRENT_REFCLK_DRIVER>; > + clock-names = "fck", "pcie_refclk"; > #address-cells = <3>; > #size-cells = <2>; > bus-range = <0x0 0xff>; > diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi > index 0160fe0da983..ebbc315649d0 100644 > --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi > @@ -34,8 +34,8 @@ pcie2_rc: pcie@2920000 { > max-link-speed = <3>; > num-lanes = <2>; > power-domains = <&k3_pds 334 TI_SCI_PD_EXCLUSIVE>; > - clocks = <&k3_clks 334 0>; > - clock-names = "fck"; > + clocks = <&k3_clks 334 0>, <&serdes1 CDNS_TORRENT_REFCLK_DRIVER>; > + clock-names = "fck", "pcie_refclk"; > #address-cells = <3>; > #size-cells = <2>; > bus-range = <0x0 0xff>; > @@ -45,6 +45,7 @@ pcie2_rc: pcie@2920000 { > dma-coherent; > dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>; > ti,syscon-pcie-ctrl = <&pcie2_ctrl 0x0>; > + ti,syscon-acspcie-proxy-ctrl = <&acspcie1_proxy_ctrl 0x3>; > status = "disabled"; > }; > > @@ -63,8 +64,8 @@ pcie3_rc: pcie@2930000 { > max-link-speed = <3>; > num-lanes = <2>; > power-domains = <&k3_pds 335 TI_SCI_PD_EXCLUSIVE>; > - clocks = <&k3_clks 335 0>; > - clock-names = "fck"; > + clocks = <&k3_clks 335 0>, <&serdes0 CDNS_TORRENT_REFCLK_DRIVER>; > + clock-names = "fck", "pcie_refclk"; > #address-cells = <3>; > #size-cells = <2>; > bus-range = <0x0 0xff>; > @@ -74,6 +75,7 @@ pcie3_rc: pcie@2930000 { > dma-coherent; > dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>; > ti,syscon-pcie-ctrl = <&pcie3_ctrl 0x0>; > + ti,syscon-acspcie-proxy-ctrl = <&acspcie0_proxy_ctrl 0x3>; > status = "disabled"; > }; > > -- > 2.34.1 > -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
