Hi, Am Mittwoch, 19. März 2025, 10:46:18 CET schrieb Daniel Baluta: > Enable MU2 node and add mu2 root clock. > MU2 is used to communicate with DSP core. > > Reviewed-by: Iuliana Prodan <iuliana.prodan@xxxxxxx> > Reviewed-by: Peng Fan <peng.fan@xxxxxxx> > Signed-off-by: Daniel Baluta <daniel.baluta@xxxxxxx> > --- > arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 4 ++++ > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 1 + > 2 files changed, 5 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts > index c26954e5a605..d2fdb420f2d3 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts > +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts > @@ -690,6 +690,10 @@ dsi_out: endpoint { > }; > }; > > +&mu2 { > + status = "okay"; > +}; > + I think this is supposed to be part of patch 5. > &pcie_phy { > fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>; > clocks = <&pcie0_refclk>; > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > index 3b725fe442d0..deb98f03180a 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > @@ -1254,6 +1254,7 @@ mu2: mailbox@30e60000 { > interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; > #mbox-cells = <2>; > status = "disabled"; > + clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_MU2_ROOT>; Please keep status as the last property. Best regards Alexander > }; > > i2c5: i2c@30ad0000 { > -- TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany Amtsgericht München, HRB 105018 Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider http://www.tq-group.com/