Add pwm nodes for RK3528. The PWM core on RK3528 is the same as
RK3328, but the driver does not support interrupts yet.
Signed-off-by: Chukun Pan <amadeus@xxxxxxxxxx>
---
arch/arm64/boot/dts/rockchip/rk3528.dtsi | 80 ++++++++++++++++++++++++
1 file changed, 80 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
index 1af0d036cf32..621fc19ac0b3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
@@ -465,6 +465,86 @@ uart7: serial@ffa28000 {
status = "disabled";
};
+ pwm0: pwm@ffa90000 {
+ compatible = "rockchip,rk3528-pwm",
+ "rockchip,rk3328-pwm";
+ reg = <0x0 0xffa90000 0x0 0x10>;
+ clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>;
+ clock-names = "pwm", "pclk";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ pwm1: pwm@ffa90010 {
+ compatible = "rockchip,rk3528-pwm",
+ "rockchip,rk3328-pwm";
+ reg = <0x0 0xffa90010 0x0 0x10>;
+ clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>;
+ clock-names = "pwm", "pclk";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ pwm2: pwm@ffa90020 {
+ compatible = "rockchip,rk3528-pwm",
+ "rockchip,rk3328-pwm";
+ reg = <0x0 0xffa90020 0x0 0x10>;
+ clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>;
+ clock-names = "pwm", "pclk";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ pwm3: pwm@ffa90030 {
+ compatible = "rockchip,rk3528-pwm",
+ "rockchip,rk3328-pwm";
+ reg = <0x0 0xffa90030 0x0 0x10>;
+ clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>;
+ clock-names = "pwm", "pclk";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ pwm4: pwm@ffa98000 {
+ compatible = "rockchip,rk3528-pwm",
+ "rockchip,rk3328-pwm";
+ reg = <0x0 0xffa98000 0x0 0x10>;
+ clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
+ clock-names = "pwm", "pclk";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ pwm5: pwm@ffa98010 {
+ compatible = "rockchip,rk3528-pwm",
+ "rockchip,rk3328-pwm";
+ reg = <0x0 0xffa98010 0x0 0x10>;
+ clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
+ clock-names = "pwm", "pclk";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ pwm6: pwm@ffa98020 {
+ compatible = "rockchip,rk3528-pwm",
+ "rockchip,rk3328-pwm";
+ reg = <0x0 0xffa98020 0x0 0x10>;
+ clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
+ clock-names = "pwm", "pclk";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ pwm7: pwm@ffa98030 {
+ compatible = "rockchip,rk3528-pwm",
+ "rockchip,rk3328-pwm";
+ reg = <0x0 0xffa98030 0x0 0x10>;
+ clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
+ clock-names = "pwm", "pclk";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
saradc: adc@ffae0000 {
compatible = "rockchip,rk3528-saradc";
reg = <0x0 0xffae0000 0x0 0x10000>;
--
2.25.1
