On Fri, Mar 14, 2025 at 07:21:12PM +0800, Kevin Chen wrote:
> The AST2600 has PCC controller in LPC, placed in LPC node.
>
> Signed-off-by: Kevin Chen <kevin_chen@xxxxxxxxxxxxxx>
> ---
> arch/arm/boot/dts/aspeed/aspeed-g6.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
> index 8ed715bd53aa..f238337e02da 100644
> --- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
> +++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
> @@ -626,6 +626,14 @@ lpc_snoop: lpc-snoop@80 {
> status = "disabled";
> };
>
> + lpc_pcc: lpc-pcc@0 {
> + compatible = "aspeed,ast2600-lpc-pcc";
> + reg = <0x0 0x140>;
> + interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
> + pcc-ports = <0x80>;
So this is 0x80 for entire SoC, then it is implied by compatible, no?
> + status = "disabled";
Where is any DTS user of this device?
Best regards,
Krzysztof
