Hi Biju,
On Tue, 18 Feb 2025 at 11:50, Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> Enable CANFD on the RZ/G3E SMARC EVK platform.
>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
Thanks for your patch!
> --- a/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts
> +++ b/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts
> @@ -10,6 +10,8 @@
> /* Switch selection settings */
> #define SW_SD0_DEV_SEL 0
> #define SW_SDIO_M2E 0
> +#define SW_GPIO8_CAN0_STB 0
> +#define SW_GPIO9_CAN1_STB 0
>
> #include <dt-bindings/gpio/gpio.h>
> #include <dt-bindings/pinctrl/renesas,r9a09g047-pinctrl.h>
> @@ -33,7 +35,50 @@ vqmmc_sd1_pvdd: regulator-vqmmc-sd1-pvdd {
> };
> };
>
> +&canfd {
> + pinctrl-0 = <&canfd_pins>;
> + pinctrl-names = "default";
> +
> + channel1 {
> + status = "okay";
> + };
> +
> + channel4 {
> + status = "okay";
> + };
> +};
> +
> &pinctrl {
> +#if SW_GPIO8_CAN0_STB
> + can0-stb-hog {
> + gpio-hog;
> + gpios = <RZG3E_GPIO(5, 4) GPIO_ACTIVE_HIGH>;
> + output-low;
> + line-name = "can0_stb";
> + };
> +#endif
> +
> +#if SW_GPIO9_CAN1_STB
> + can1-stb-hog {
> + gpio-hog;
> + gpios = <RZG3E_GPIO(5, 5) GPIO_ACTIVE_HIGH>;
> + output-low;
> + line-name = "can1_stb";
> + };
> +#endif
Please model this as proper CAN transceivers instead of GPIO hogs.
The two CANFD channels share a dual TCAN1046V transceiver, which I
believe is just a single chip with two TCAN1042 instances. The TI
AM68 SK DTS[1] can serve as an example, as it also models each TCAN1046V
as two TCAN1042 instances, but lacks standby-gpios.
The White Hawk DTS[2] lacks standby-gpios, but does have enable-gpios.
[1] arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
[2] arch/arm64/boot/dts/renesas/white-hawk-common.dtsi
> --- a/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi
> +++ b/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi
> @@ -12,6 +12,17 @@
> * SW_SDIO_M2E:
> * 0 - SMARC SDIO signal is connected to uSD1
> * 1 - SMARC SDIO signal is connected to M.2 Key E connector
> + *
> + * Please set the switch position SW_GPIO_CAN_PMOD on the carrier board and the
> + * corresponding macro SW_GPIO8_CAN0_STB/SW_GPIO8_CAN0_STB on the board DTS:
> + *
> + * SW_GPIO8_CAN0_STB:
> + * 0 - Connect to GPIO8 PMOD (default)
> + * 1 - Connect to CAN0 transceiver STB pin
Doesn't this channel also need correct positioning of the SW_LCD_EN#
switch on the SMARC module?
> + *
> + * SW_GPIO9_CAN1_STB:
> + * 0 - Connect to GPIO9 PMOD (default)
> + * 1 - Connect to CAN1 transceiver STB pin
> */
Doesn't this channel also need correct positioning of the SW_PDM_EN#
and SW_LCD_EN# (for GPIO9!) switches on the SMARC module?
>
> / {
> @@ -29,6 +40,10 @@ aliases {
> };
> };
>
> +&canfd {
> + status = "okay";
> +};
> +
> &scif0 {
> status = "okay";
> };
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
