On Mi, 2025-03-12 at 22:59 +0100, Heiko Stuebner wrote: > Id 173 was accidentially used two times for SRST_P_DDR_HWLP and > SRST_P_DDR_PHY. This makes both resets ambiguous and also causes build > warnings like: > > drivers/clk/rockchip/rst-rk3562.c:21:57: error: initialized field overwritten [-Werror=override-init] > 21 | #define RK3562_DDRCRU_RESET_OFFSET(id, reg, bit) [id] = (0x20000*4 + reg * 16 + bit) > | ^ > drivers/clk/rockchip/rst-rk3562.c:266:9: note: in expansion of macro 'RK3562_DDRCRU_RESET_OFFSET' > 266 | RK3562_DDRCRU_RESET_OFFSET(SRST_P_DDR_PHY, 0, 8), > | ^~~~~~~~~~~~~~~~~~~~~~~~~~ > drivers/clk/rockchip/rst-rk3562.c:21:57: note: (near initialization for 'rk3562_register_offset[173]') > 21 | #define RK3562_DDRCRU_RESET_OFFSET(id, reg, bit) [id] = (0x20000*4 + reg * 16 + bit) > | ^ > drivers/clk/rockchip/rst-rk3562.c:266:9: note: in expansion of macro 'RK3562_DDRCRU_RESET_OFFSET' > 266 | RK3562_DDRCRU_RESET_OFFSET(SRST_P_DDR_PHY, 0, 8), > | ^~~~~~~~~~~~~~~~~~~~~~~~~~ > > To fix that issue give SRST_P_DDR_PHY a new and now unique id. > > Reported-by: Stephen Boyd <sboyd@xxxxxxxxxx> > Reported-by: kernel test robot <lkp@xxxxxxxxx> > Closes: https://lore.kernel.org/oe-kbuild-all/202503121743.0zcDf6nE-lkp@xxxxxxxxx/ > Fixes: dd113c4fefc8 ("dt-bindings: clock: Add RK3562 cru") > Signed-off-by: Heiko Stuebner <heiko@xxxxxxxxx> > --- > The original patch did go with the reset of the clock controller code > into the clock tree, so this patch should of course also go that way. Acked-by: Philipp Zabel <p.zabel@xxxxxxxxxxxxxx> regards Philipp
