On Wed, Mar 05, 2025 at 02:43:52PM +0000, Russell King (Oracle) wrote: > On Wed, Mar 05, 2025 at 02:42:46PM +0530, Swathi K S wrote: > > The FSD SoC contains two instance of the Synopsys DWC ethernet QOS IP core. > > The binding that it uses is slightly different from existing ones because > > of the integration (clocks, resets). > > > > Signed-off-by: Swathi K S <swathi.ks@xxxxxxxxxxx> > > This looks much better! > > Reviewed-by: Russell King (Oracle) <rmk+kernel@xxxxxxxxxxxxxxx> > > Thanks! Hi Swathi, Please can you test with my TX clock gating series applied ( https://lore.kernel.org/r/Z9FVHEf3uUqtKzyt@xxxxxxxxxxxxxxxxxxxxx ) with STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP set as per the attached diff. Please let me know whether this passes your testing, so I know whether this platform supports it - please check that this results in a message in the kernel log indicating "tx_clk_stop = 1". Thanks. -- RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c index a94088b32c11..64867a65e875 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c @@ -363,6 +363,7 @@ static int dwc_eth_dwmac_probe(struct platform_device *pdev) plat_dat->stmmac_clk = dwc_eth_find_clk(plat_dat, data->stmmac_clk_name); + plat_dat->flags |= STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP; if (data->probe) ret = data->probe(pdev, plat_dat, &stmmac_res); diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 6f29804148b6..b015240e4121 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -1109,6 +1109,8 @@ static int stmmac_mac_enable_tx_lpi(struct phylink_config *config, u32 timer, if (priv->plat->flags & STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP) priv->tx_lpi_clk_stop = tx_clk_stop; + netdev_info(priv->dev, "tx_clk_stop = %u\n", priv->tx_lpi_clk_stop); + stmmac_set_eee_timer(priv, priv->hw, STMMAC_DEFAULT_LIT_LS, STMMAC_DEFAULT_TWT_LS);
