On Mon, Mar 10, 2025 at 05:34:56PM +0100, Krzysztof Kozlowski wrote: > On 09/03/2025 14:29, Christian Marangi wrote: > > Add documentation for Airoha AN7581 USB PHY that describe the USB PHY > > for the USB controller. > > > > Airoha AN7581 SoC support a maximum of 2 USB port. The USB 2.0 mode is > > always supported. The USB 3.0 mode is optional and depends on the Serdes > > mode currently configured on the system for the USB port. If USB 3.0 node > > is defined, then airoha,scu-ssr property is required for Serdes mode > > validation. > > > > Signed-off-by: Christian Marangi <ansuelsmth@xxxxxxxxx> > > --- > > .../bindings/phy/airoha,an7581-usb-phy.yaml | 106 ++++++++++++++++++ > > MAINTAINERS | 6 + > > 2 files changed, 112 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/phy/airoha,an7581-usb-phy.yaml > > > > diff --git a/Documentation/devicetree/bindings/phy/airoha,an7581-usb-phy.yaml b/Documentation/devicetree/bindings/phy/airoha,an7581-usb-phy.yaml > > new file mode 100644 > > index 000000000000..39127cfb63a7 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/phy/airoha,an7581-usb-phy.yaml > > @@ -0,0 +1,106 @@ > > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/phy/airoha,an7581-usb-phy.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Airoha AN7581 SoC USB PHY > > + > > +maintainers: > > + - Christian Marangi <ansuelsmth@xxxxxxxxx> > > + > > +description: > > > + The Airoha AN7581 SoC USB PHY describes the USB PHY for the USB controller. > > + > > + Airoha AN7581 SoC support a maximum of 2 USB port. The USB 2.0 mode is > > + always supported. The USB 3.0 mode is optional and depends on the Serdes > > + mode currently configured on the system for the USB port. If USB 3.0 node > > + is defined, then airoha,scu-ssr property is required for Serdes mode > > + validation. > > + > > +properties: > > + compatible: > > + const: airoha,an7581-usb-phy > > + > > + reg: > > + maxItems: 1 > > + > > + airoha,port-id: > > + description: Describe the physical port this USB PHY refer to. A dedicated > > + osciallator is used for each port for the USB 2.0 Slew Rate calibration. > > typo > > > + $ref: /schemas/types.yaml#/definitions/uint32 > > + enum: [0, 1] > > I don't understand why do you need index property here (which are > usually not allowed). > Eh... As said in the description this is really to differentiate the 2 different physical port... Each port have a dedicated oscillator for calibration and these calibration are identified by an offset (all placed one after another in a separate register space). Oscillator 0 for physical port 0 Oscillator 1 for physcial port 1 And model this is a bit problematic without an additional property, any hint for this? > > + > > + airoha,scu-ssr: > > + description: Phandle to the SCU SSR node for USB 3.0 Serdes mode validation. > > + $ref: /schemas/types.yaml#/definitions/phandle > > + > > + usb2-phy: > > + type: object > > + > > + properties: > > + '#phy-cells': > > + const: 1 > > + > > + required: > > + - '#phy-cells' > > + > > + additionalProperties: false > > Also no resources in usb[23]-phy, so this goes to the parent level and > you have phy-cells=2. Your DTS gives some hint that devices actually > differ but the commit msg contradicts it, so I don't get. Do you have > same IP block here or two different? > SoC have 2 physical USB port. Physical port 0 on address: 0x1fab0000 Physcial port 1 on address: 0x1fad0000 In those space there are registers to configure USB 2.0 mode and USB 3.0 mode for each physical port. So yes no child node, phy-cells 2 and reference with phys = <&usb_phy 0 PHY_TYPE_USB2>, <&usb_phy 1 PHY_TYPE_USB3>; that totally works and hope now the HW is more clear. The real problematic part is the one above with identify the 2 physical port. > > + > > diff --git a/MAINTAINERS b/MAINTAINERS > > index fe34c80b8d52..c2dd385e9165 100644 > > --- a/MAINTAINERS > > +++ b/MAINTAINERS > > @@ -753,6 +753,12 @@ S: Maintained > > F: Documentation/devicetree/bindings/spi/airoha,en7581-snand.yaml > > F: drivers/spi/spi-airoha-snfi.c > > > > +AIROHA USB PHY DRIVER > > +M: Christian Marangi <ansuelsmth@xxxxxxxxx> > > +L: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx (moderated for non-subscribers) > > +S: Maintained > > +F: Documentation/devicetree/bindings/phy/airoha,an7581-usb-phy.yam > > Typo in extension/missing l. > > > > Best regards, > Krzysztof -- Ansuel
