> On 10/03/2025 02:50, Kevin Chen wrote: > >>> + $ref: /schemas/types.yaml#/definitions/uint32-array > >>> + description: The LPC I/O ports to pcc > >> > >> Description is too vague. Why would we encode I/O ports as some > >> numbers instead of GPIOs for example? If these are ports, why this is not a > graph? > > For the port-mmaped I/O in x86 architecture, BMC need to handle specific > port I/O in the relative HW module. > > So, I need to add the pcc-ports property as the snoop-ports property > > in Documentation/devicetree/bindings/mfd/aspeed-lpc.yaml > > > >> > >> Missing constraints - min/maxItems, defaults, minimum/maximum etc. > > The port-mmaped I/O is defined from host, BMC as the device would capture > the port I/O from the pcc-ports property defined in dts. > > Put this information in the description, instead of copying property name. OK. I will put this information in the description. > > > > >> > >>> + > >>> + required: > >>> + - compatible > >>> + - interrupts > >>> + - pcc-ports > >>> + > >>> "^uart-routing@[0-9a-f]+$": > >>> $ref: /schemas/soc/aspeed/uart-routing.yaml# > >>> description: The UART routing control under LPC register space > >>> @@ > >>> -176,6 +205,13 @@ examples: > >>> #size-cells = <1>; > >>> ranges = <0x0 0x1e789000 0x1000>; > >>> > >>> + lpc_pcc: lpc-pcc@0 { > >>> + compatible = "aspeed,ast2600-lpc-pcc"; > >>> + reg = <0x0 0x140>; > >>> + interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; > >>> + pcc-ports = <0x80>; > >> > >> So what 0x80 stands for? > > Host as x86 architecture would access the 0x80 port, which is mapped to the > BMC PCC HW module. > > As a result, x86 can keep the port-mmaped I/O usage and access the BMC > device, which is needed to know which port using in the PCC module in BMC. > > And on different boards this is not 0x80? The port-mmaped I/O defined in the intel legacy document as the example usage. For example, the common usage agreement of port-mmaped I/O are the following. But this setting can be modified due to the host usage. We provide the flexibility to modify the I/O port settings. KCS : 0xCA2(CMD)/CA3(Data) BT : 0xE4/E5/E6 SNOOP/PCC : 0x80/81/82/83 Mailbox : 0xCC0 SuperIO : 0x2E/2F or 0x4E/0x4F System UART : 0x3F8/2F8/3E8/2E8 > > Best regards, > Krzysztof