On Wed, 05 Mar 2025 19:46:20 +0100
Jernej Škrabec <jernej.skrabec@xxxxxxxxx> wrote:
Hi,
> Dne torek, 4. marec 2025 ob 23:23:02 Srednjeevropski standardni čas je Andre Przywara napisal(a):
> > The Allwinner A523, and its siblings A527 and T527, which share the same
> > die, are a new family of SoCs introduced in 2023. They features eight
> > Arm Cortex-A55 cores, and, among the other usual peripherals, a PCIe and
> > USB 3.0 controller.
> >
> > Add the basic SoC devicetree .dtsi for the chip, describing the
> > fundamental peripherals: the cores, GIC, timer, RTC, CCU and pinctrl.
> > Also some other peripherals are fully compatible with previous IP, so
> > add the USB and MMC nodes as well.
> > The other peripherals will be added in the future, once we understand
> > their compatibility and DT requirements.
> >
> > Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx>
> > ---
> > .../arm64/boot/dts/allwinner/sun55i-a523.dtsi | 598 ++++++++++++++++++
> > 1 file changed, 598 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> >
> > diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> > new file mode 100644
> > index 0000000000000..01e662bdf5521
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> > @@ -0,0 +1,598 @@
> > +// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
> > +// Copyright (C) 2023-2024 Arm Ltd.
> > +
...
> > +
> > + mmc2_pins: mmc2-pins {
> > + pins = "PC1" ,"PC5", "PC6", "PC8", "PC9",
> > + "PC10", "PC11", "PC13", "PC14", "PC15",
> > + "PC16";
>
> I guess PC0 should be also included, for HS400 capable cards.
Sure, it doesn't conflict with much else (just NAND flash), so that's
no problem.
> With that fixed:
> Reviewed-by: Jernej Skrabec <jernej.skrabec@xxxxxxxxx>
Many thanks for that!
Cheers,
Andre
>
> Best regards,
> Jernej
>
