Add SPI NAND support for ipq9574 SoC. Signed-off-by: Md Sadre Alam <quic_mdalam@xxxxxxxxxxx> --- Change in [v2] * Added "qcom,bam-v1.7.4" compatible in qpic_bam node * sorted qpic_bamd and qpic_nand entry in dt Change in [v1] * Moved changes in ipq9574-rdp-common.dtsi to separate patch * Prefixed zero for reg address in qpic_bam and qpic_nand * For full change history, please refer to https://lore.kernel.org/linux-arm-msm/20241120091507.1404368-8-quic_mdalam@xxxxxxxxxxx/ arch/arm64/boot/dts/qcom/ipq9574.dtsi | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi index cac58352182e..819d6cdf4197 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -673,6 +673,33 @@ blsp1_spi4: spi@78b9000 { status = "disabled"; }; + qpic_bam: dma-controller@7984000 { + compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0"; + reg = <0x07984000 0x1c000>; + interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&gcc GCC_QPIC_AHB_CLK>; + clock-names = "bam_clk"; + #dma-cells = <1>; + qcom,ee = <0>; + status = "disabled"; + }; + + qpic_nand: spi@79b0000 { + compatible = "qcom,ipq9574-snand"; + reg = <0x079b0000 0x10000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&gcc GCC_QPIC_CLK>, + <&gcc GCC_QPIC_AHB_CLK>, + <&gcc GCC_QPIC_IO_MACRO_CLK>; + clock-names = "core", "aon", "iom"; + dmas = <&qpic_bam 0>, + <&qpic_bam 1>, + <&qpic_bam 2>; + dma-names = "tx", "rx", "cmd"; + status = "disabled"; + }; + usb_0_qusbphy: phy@7b000 { compatible = "qcom,ipq9574-qusb2-phy"; reg = <0x0007b000 0x180>; -- 2.34.1
