On 2/7/2025 5:48 PM, Konrad Dybcio wrote:
On 16.01.2025 6:05 PM, Stephan Gerhold wrote:
On Mon, Jan 13, 2025 at 01:08:18PM -0800, Melody Olvera wrote:
From: Shivnandan Kumar <quic_kshivnan@xxxxxxxxxxx>
Add the CPU BWMONs for SM8750 SoCs.
Signed-off-by: Shivnandan Kumar <quic_kshivnan@xxxxxxxxxxx>
Signed-off-by: Melody Olvera <quic_molvera@xxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sm8750.dtsi | 74 ++++++++++++++++++++++++++++++++++++
1 file changed, 74 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi
index 3bbd7d18598ee0a3a0d5130c03a3166e1fc14d82..09fe3149da1926b74a98280fe209ae7f423db864 100644
--- a/arch/arm64/boot/dts/qcom/sm8750.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi
@@ -2802,6 +2802,80 @@ rpmhpd_opp_super_turbo_no_cpr: opp-480 {
};
};
+ /* cluster0 */
+ pmu@240b3400 {
+ compatible = "qcom,sm8750-cpu-bwmon", "qcom,sdm845-bwmon";
+ reg = <0x0 0x240b3400 0x0 0x600>;
+
+ interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
+
+ interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
The start of the interconnect path is QCOM_ICC_TAG_ACTIVE_ONLY, but the
destination is QCOM_ICC_TAG_ALWAYS? This is strange. Interconnect used
by the CPU should be QCOM_ICC_TAG_ACTIVE_ONLY.
I'm not sure if this is a question, but I second, both should be ACTIVE_ONLY
Apologies for not getting back to this for a while, but I spoke w some
folks and y'all are right. Will correct.
Thanks,
Melody
