Add documentation and functionality for LLCC v6 used on the SM8750 SoCs. LLCC v6 rearranges several registers and offsets and supports slice IDs over 31, so new functionality is necessary to program and use LLCC v6. --- Changes in v2: - moved v6 offsets into cfg struct - reverse xmas-treed variable declarations & removed unused - removed unneeded skip_llcc_cfg branch in v6 - updated some macros to use BITS, GENMASK, FIELD_PREP - moved LLCC_* definitions to appropriate patch - updated sm8750 slice data struct to match updated standard - fixed style on dt node - note: did not add cleanup patch to use bitfields - Link to v1: https://lore.kernel.org/r/20250113-sm8750_llcc_master-v1-0-5389b92e2d7a@xxxxxxxxxxx --- Melody Olvera (4): dt-bindings: cache: qcom,llcc: Document SM8750 LLCC block soc: qcom: llcc-qcom: Add support for LLCC V6 soc: qcom: llcc-qcom: Add support for SM8750 arm64: dts: qcom: sm8750: Add LLCC node .../devicetree/bindings/cache/qcom,llcc.yaml | 2 + arch/arm64/boot/dts/qcom/sm8750.dtsi | 18 + drivers/soc/qcom/llcc-qcom.c | 481 ++++++++++++++++++++- include/linux/soc/qcom/llcc-qcom.h | 8 + 4 files changed, 505 insertions(+), 4 deletions(-) --- base-commit: 20d5c66e1810e6e8805ec0d01373afb2dba9f51a change-id: 20250107-sm8750_llcc_master-baa3de44b03b Best regards, -- Melody Olvera <quic_molvera@xxxxxxxxxxx>
