Hi, Ryan,
On 27.02.2025 17:52, Ryan.Wanner@xxxxxxxxxxxxx wrote:
> From: Ryan Wanner <Ryan.Wanner@xxxxxxxxxxxxx>
>
> Add SRAM, secumod, UDDRC, and DDR3phy to enable support for low power modes.
>
> Signed-off-by: Ryan Wanner <Ryan.Wanner@xxxxxxxxxxxxx>
> ---
> arch/arm/boot/dts/microchip/sama7d65.dtsi | 35 +++++++++++++++++++++++
> 1 file changed, 35 insertions(+)
>
> diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi
> index 92a5347e35b5..c10cc3558efd 100644
> --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi
> +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi
> @@ -47,12 +47,37 @@ slow_xtal: clock-slowxtal {
> };
> };
>
> + ns_sram: sram@100000 {
> + compatible = "mmio-sram";
> + reg = <0x100000 0x20000>;
> + ranges;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + };
> +
> soc {
> compatible = "simple-bus";
> ranges;
> #address-cells = <1>;
> #size-cells = <1>;
>
> + securam: sram@e0000800 {
> + compatible = "microchip,sama7d65-securam", "atmel,sama5d2-securam", "mmio-sram";
> + reg = <0xe0000800 0x4000>;
> + ranges = <0 0xe0000800 0x4000>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + no-memory-wc;
> + };
> +
> + secumod: secumod@e0004000 {
> + compatible = "microchip,sama7d65-secumod", "atmel,sama5d2-secumod", "syscon";
microchip,sama7d65-secumod is undocumented. I'll postpone this until a
documentation a patch will be posted.
> + reg = <0xe0004000 0x4000>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + };
> +
> pioa: pinctrl@e0014000 {
> compatible = "microchip,sama7d65-pinctrl", "microchip,sama7g5-pinctrl";
> reg = <0xe0014000 0x800>;
> @@ -190,6 +215,16 @@ i2c10: i2c@600 {
> };
> };
>
> + uddrc: uddrc@e3800000 {
> + compatible = "microchip,sama7d65-uddrc", "microchip,sama7g5-uddrc";
> + reg = <0xe3800000 0x4000>;
> + };
> +
> + ddr3phy: ddr3phy@e3804000 {
> + compatible = "microchip,sama7d65-ddr3phy", "microchip,sama7g5-ddr3phy";
> + reg = <0xe3804000 0x1000>;
> + };
> +
> gic: interrupt-controller@e8c11000 {
> compatible = "arm,cortex-a7-gic";
> reg = <0xe8c11000 0x1000>,
