On 27.02.2025 5:04 PM, Neil Armstrong wrote:
> The ARM PMU interrupt is sometimes defined as IRQ_TYPE_LEVEL_LOW,
> or IRQ_TYPE_LEVEL_HIGH, but downstream and recent platforms used the
> IRQ_TYPE_LEVEL_HIGH flag so align the SM8650 definition to have a
> functional PMU working.
>
> Fixes: c8a346e408cb ("arm64: dts: qcom: Split PMU nodes for heterogeneous CPUs")
> Fixes: d2350377997f ("arm64: dts: qcom: add initial SM8650 dtsi")
> Signed-off-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx>
> ---
I couldn't find anything to back this up, not inside, not on Arm's
website, but downstream agrees, so..
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx>
Konrad
