From: Ryan Wanner <Ryan.Wanner@xxxxxxxxxxxxx>
Add Reset Controller support to SAMA7D65 SoC.
Signed-off-by: Ryan Wanner <Ryan.Wanner@xxxxxxxxxxxxx>
---
arch/arm/boot/dts/microchip/sama7d65.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi
index c10cc3558efd..5165259fb926 100644
--- a/arch/arm/boot/dts/microchip/sama7d65.dtsi
+++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi
@@ -102,6 +102,13 @@ pmc: clock-controller@e0018000 {
clock-names = "td_slck", "md_slck", "main_xtal";
};
+ reset_controller: reset-controller@e001d100 {
+ compatible = "microchip,sama7d65-rstc", "microchip,sama7g5-rstc";
+ reg = <0xe001d100 0xc>, <0xe001d1e4 0x4>;
+ #reset-cells = <1>;
+ clocks = <&clk32k 0>;
+ };
+
clk32k: clock-controller@e001d500 {
compatible = "microchip,sama7d65-sckc", "microchip,sam9x60-sckc";
reg = <0xe001d500 0x4>;
--
2.43.0
