On Fri, Feb 21, 2025 at 06:03:46PM +0000, Vincenzo Frascino wrote:
> The Morello architecture is an experimental extension to Armv8.2-A,
> which extends the AArch64 state with the principles proposed in
> version 7 of the Capability Hardware Enhanced RISC Instructions
> (CHERI) ISA.
>
> The Morello Platform (soc) and the Fixed Virtual Platfom (fvp) share
> some functionalities that have conveniently been included in
> morello.dtsi to avoid duplication.
>
> Introduce morello.dtsi.
>
> Note: Morello fvp will be introduced with a future patch series.
>
> Signed-off-by: Vincenzo Frascino <vincenzo.frascino@xxxxxxx>
> ---
> arch/arm64/boot/dts/arm/morello.dtsi | 323 +++++++++++++++++++++++++++
> 1 file changed, 323 insertions(+)
> create mode 100644 arch/arm64/boot/dts/arm/morello.dtsi
>
> diff --git a/arch/arm64/boot/dts/arm/morello.dtsi b/arch/arm64/boot/dts/arm/morello.dtsi
> new file mode 100644
> +
> + gic: interrupt-controller@2c010000 {
> + compatible = "arm,gic-v3";
> + reg = <0x0 0x30000000 0x0 0x10000>, /* GICD */
> + <0x0 0x300c0000 0x0 0x80000>; /* GICR */
[...]
> +
> +
> + sram: sram@45200000 {
> + compatible = "mmio-sram";
> + reg = <0x0 0x06000000 0x0 0x8000>;
> + ranges = <0 0x0 0x06000000 0x8000>;
> +
[...]
Not sure if you are not seeing these warnings from DTC. Looks pretty clear
to me. May be you missed or using some old DTC. I don't know why though.
If you agree, I can patch it up with below patch and no need to repost:
morello.dtsi:227.38-272.5: Warning (simple_bus_reg): /soc/interrupt-controller@2c010000: simple-bus unit address format error, expected "30000000"
morello.dtsi:296.23-313.5: Warning (simple_bus_reg): /soc/sram@45200000: simple-bus unit address format error, expected "6000000"
morello.dtsi:227.38-272.5: Warning (simple_bus_reg): /soc/interrupt-controller@2c010000: simple-bus unit address format error, expected "30000000"
morello.dtsi:296.23-313.5: Warning (simple_bus_reg): /soc/sram@45200000: simple-bus unit address format error, expected "6000000"
Regards,
Sudeep
-->8
diff --git i/arch/arm64/boot/dts/arm/morello.dtsi w/arch/arm64/boot/dts/arm/morello.dtsi
index e35e5e482720..0bab0b3ea969 100644
--- i/arch/arm64/boot/dts/arm/morello.dtsi
+++ w/arch/arm64/boot/dts/arm/morello.dtsi
@@ -224,7 +224,7 @@ uart0: serial@2a400000 {
status = "disabled";
};
- gic: interrupt-controller@2c010000 {
+ gic: interrupt-controller@30000000 {
compatible = "arm,gic-v3";
reg = <0x0 0x30000000 0x0 0x10000>, /* GICD */
<0x0 0x300c0000 0x0 0x80000>; /* GICR */
@@ -293,7 +293,7 @@ mailbox: mhu@45000000 {
clock-names = "apb_pclk";
};
- sram: sram@45200000 {
+ sram: sram@6000000 {
compatible = "mmio-sram";
reg = <0x0 0x06000000 0x0 0x8000>;
ranges = <0 0x0 0x06000000 0x8000>;
