On Wed, Feb 26, 2025 at 11:31:26AM -0500, Frank Li wrote: > On Wed, Feb 26, 2025 at 01:11:37PM +0100, Alexander Stein wrote: > > Hi Frank, > > > > Am Dienstag, 28. Januar 2025, 22:15:58 CET schrieb Frank Li: > > > Add PCIe's msi-map and iommu-map property because i.MX95 support smmu and > > > its. > > > > > > Signed-off-by: Frank Li <Frank.Li@xxxxxxx> > > > --- > > > arch/arm64/boot/dts/freescale/imx95.dtsi | 14 ++++++++++++++ > > > 1 file changed, 14 insertions(+) > > > > > > diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi > > > index 6b8470cb3461a..2cebeda43a52d 100644 > > > --- a/arch/arm64/boot/dts/freescale/imx95.dtsi > > > +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi > > > @@ -1573,6 +1573,12 @@ pcie0: pcie@4c300000 { > > > assigned-clock-parents = <0>, <0>, > > > <&scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2>; > > > power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>; > > > + /* pcie0's Devid(BIT[7:6]) is 0x00, stream id(BIT[5:0]) is 0x10~0x17 */ > > > + msi-map = <0x0 &its 0x10 0x1>, > > > + <0x100 &its 0x11 0x7>; > > > > Aren't you missing msi-map-mask = <0x1ff>; here? Similar to pcie1. > > Either way, with this change PCIe on pcie0 is not working anymore, > > regardless of msi-map-mask. > > Yes, it should have msi-map-mask. During my test, I have not enable enetc > so I have not found this problem. I check dts again. There are linux,pci-domain = <0>; It should work without msi-map-mask. I am not sure why 0000:03:00.0 ^^ bus number is 03 at your system. > > > > > Without msi-map-mask: > > > OF: /soc/pcie@4c300000: iommu-map, using mask 000001ff, id-base: 00000100, out-base: 00000011, length: 00000007, id: 00000300 -> 00000011 > > > OF: /soc/pcie@4c300000: no msi-map translation for id 0x300 on (null) > > > r8169 0000:03:00.0: error -EINVAL: enable failure > > > r8169 0000:03:00.0: probe with driver r8169 failed with error -22 > > > > With msi-map-mask: > > > OF: /soc/pcie@4c300000: iommu-map, using mask 000001ff, id-base: 00000100, out-base: 00000011, length: 00000007, id: 00000300 -> 00000011 > > > OF: /soc/pcie@4c300000: msi-map, using mask 000001ff, id-base: 00000100, out-base: 00000011, length: 00000007, id: 00000300 -> 00000011 > > > r8169 0000:03:00.0: enabling device (0000 -> 0003) > > > r8169 0000:03:00.0: enabling Mem-Wr-Inval > > > r8169 0000:03:00.0: error -EIO: PCI read failed > > > r8169 0000:03:00.0: probe with driver r8169 failed with error -5 > > Can you try remove iommu-map and keep msi-map? then remove msi-map and > keep iommu-map to check which one cause this problem. > > > > > Without msi-map/iommu-map: > > > r8169 0000:03:00.0: enabling device (0000 -> 0003) > > > r8169 0000:03:00.0: enabling Mem-Wr-Inval > > > r8169 0000:03:00.0 eth0: RTL8168g/8111g, d8:9d:b9:00:16:10, XID 4c0, IRQ 166 > > > r8169 0000:03:00.0 eth0: jumbo features [frames: 9194 bytes, tx checksumming: ko] > > > r8169 0000:03:00.0 enp3s0: renamed from eth0 > > > r8169 0000:03:00.0: enabling bus mastering > > > r8169 0000:03:00.0 enp3s0: Link is Down > > > > pcie1 works as expected. But this is only a single PCIe device, rather than > > having a PCIe bridge. > > Any idea what's wrong here? > > Can you help dump more information at for PCIe bridge case: > > imx_pcie_add_lut(), need rid and sid information. > drivers/pci/controller/dwc/pci-imx6.c > > > > > Best regards, > > Alexander > > > > > + iommu-map = <0x000 &smmu 0x10 0x1>, > > > + <0x100 &smmu 0x11 0x7>; > > > + iommu-map-mask = <0x1ff>; > > > fsl,max-link-speed = <3>; > > > status = "disabled"; > > > }; > > > @@ -1640,6 +1646,14 @@ pcie1: pcie@4c380000 { > > > assigned-clock-parents = <0>, <0>, > > > <&scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2>; > > > power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>; > > > + /* pcie1's Devid(BIT[7:6]) is 0x10, stream id(BIT[5:0]) is 0x18~0x1f */ > > > + msi-map = <0x0 &its 0x98 0x1>, > > > + <0x100 &its 0x99 0x7>; > > > + msi-map-mask = <0x1ff>; > > > + /* smmu have not Devid(BIT[7:6]) */ > > > + iommu-map = <0x000 &smmu 0x18 0x1>, > > > + <0x100 &smmu 0x19 0x7>; > > > + iommu-map-mask = <0x1ff>; > > > fsl,max-link-speed = <3>; > > > status = "disabled"; > > > }; > > > > > > > > > -- > > TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany > > Amtsgericht München, HRB 105018 > > Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider > > http://www.tq-group.com/ > > > >