On Thursday 30 April 2015 22:44:00 Aaro Koskinen wrote: > +1) Main node > + > + Required properties: > + > + - compatible: must be "cavium,octeon-5750-usbn" > + > + - reg: specifies the physical base address of the USBN block and > + the length of the memory mapped region. > + > + - #address-cells: specifies the number of cells needed to encode an > + address. The value must be 2. > + > + - #size-cells: specifies the number of cells used to represent the size > + of an address. The value must be 2. > + > + - ranges: specifies the translation between child address space and parent > + address space. > + > + - refclk-frequency: speed of the USB reference clock. Allowed values are > + 12000000, 24000000 or 48000000. > + > + - refclk-type: type of the USB reference clock. Allowed values are > + "crystal" or "external". > + > +2) Child node > + > + The main node must have one child node which describes the built-in > + USB controller. > + > + Required properties: > + > + - compatible: must be "cavium,octeon-5750-usbc" > + > + - reg: specifies the physical base address of the USBC block and > + the length of the memory mapped region. > + > + - interrupts: specifies the interrupt number for the USB controller. > + > What does that main node actually do? The common setup is that you have regular ehci/ohci/uhci host bridges connected to an mmio bus, plus with shared PHY driver that would nowadays sit in drivers/phy/ and handle the setup of the physical USB interface. Is Octeon different from everything else here? Arnd -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
