This series converts the fsl,elbc binding to YAML and adds new bindings for related devices (particular kinds of chip on the eLBC). For readability, the existing unit address syntax of <cs>,<offset> (e.g. nand@1,0) is kept. This results in a few dtc validation warnings, when combined with other choices in this patchset: - For compatibility with existing kernels which don't explicitly probe under an eLBC controller, the "simple-bus" compatible string is kept on eLBC controller nodes. The validation logic requires a linear unit address, though (e.g. @100000000 instead of @1,0) - The eLBC NAND flash binding (fsl,elbc-fcm-nand) references raw-nand-chip.yaml, which again requires a linear unit address The patches in this series were previously part of the following series, which turned out to be too large and unwieldy: [PATCH v2 00/12] YAML conversion of several Freescale/PowerPC DT bindings https://lore.kernel.org/lkml/20250207-ppcyaml-v2-0-8137b0c42526@xxxxxxxxxx/ Changelogs are present in the individual patches. Signed-off-by: J. Neuschäfer <j.ne@xxxxxxxxxx> --- J. Neuschäfer (3): dt-bindings: memory-controllers: Add fsl,elbc-gpcm-uio dt-bindings: nand: Add fsl,elbc-fcm-nand dt-bindings: memory-controllers: Convert fsl,elbc to YAML .../memory-controllers/fsl,elbc-gpcm-uio.yaml | 59 ++++++++ .../bindings/memory-controllers/fsl,elbc.yaml | 158 +++++++++++++++++++++ .../devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml | 68 +++++++++ .../devicetree/bindings/powerpc/fsl/lbc.txt | 43 ------ 4 files changed, 285 insertions(+), 43 deletions(-) --- base-commit: 2014c95afecee3e76ca4a56956a936e23283f05b change-id: 20250220-ppcyaml-elbc-bb85941fb250 Best regards, -- J. Neuschäfer <j.ne@xxxxxxxxxx>
