On Wed, Feb 26, 2025 at 09:30:01AM +0100, Alexander Stein wrote: > Hi Frank, > > Am Dienstag, 25. Februar 2025, 18:08:02 CET schrieb Frank Li: > > Add "ref" clock for i.MX95's pcie and fix below CHECK_DTBS warnings: > > arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie@4c300000: clock-names: ['pcie', 'pcie_bus', 'pcie_phy', 'pcie_aux'] is too short > > from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie.yaml > > > > Signed-off-by: Frank Li <Frank.Li@xxxxxxx> > > --- > > change from v2 - v3 > > - fix typo 1000000 > > > > change from v1 - v2 > > - rebase to dt/dt64 > > - add clock 100mhz > > --- > > arch/arm64/boot/dts/freescale/imx95.dtsi | 25 ++++++++++++++++++++---- > > 1 file changed, 21 insertions(+), 4 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi > > index 51625bc9154ec..9bb26b466a061 100644 > > --- a/arch/arm64/boot/dts/freescale/imx95.dtsi > > +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi > > @@ -291,6 +291,13 @@ sai5_mclk: clock-sai-mclk5 { > > clock-output-names = "sai5_mclk"; > > }; > > > > + clk_sys100m: clock-sys100m { > > + compatible = "fixed-clock"; > > + #clock-cells = <0>; > > + clock-frequency = <100000000>; > > + clock-output-names = "clk_sys100m"; > > + }; > > + > > Where does this clock come from? Does this origin on board-level? It is internal PLL. Frank > > Best regards, > Alexander > > > osc_24m: clock-24m { > > compatible = "fixed-clock"; > > #clock-cells = <0>; > > @@ -1595,6 +1602,14 @@ usb3_dwc3: usb@4c100000 { > > }; > > }; > > > > + hsio_blk_ctl: syscon@4c0100c0 { > > + compatible = "nxp,imx95-hsio-blk-ctl", "syscon"; > > + reg = <0x0 0x4c0100c0 0x0 0x1>; > > + #clock-cells = <1>; > > + clocks = <&clk_sys100m>; > > + power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>; > > + }; > > + > > usb3_phy: phy@4c1f0040 { > > compatible = "fsl,imx95-usb-phy", "fsl,imx8mp-usb-phy"; > > reg = <0x0 0x4c1f0040 0x0 0x40>, > > @@ -1633,8 +1648,9 @@ pcie0: pcie@4c300000 { > > clocks = <&scmi_clk IMX95_CLK_HSIO>, > > <&scmi_clk IMX95_CLK_HSIOPLL>, > > <&scmi_clk IMX95_CLK_HSIOPLL_VCO>, > > - <&scmi_clk IMX95_CLK_HSIOPCIEAUX>; > > - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux"; > > + <&scmi_clk IMX95_CLK_HSIOPCIEAUX>, > > + <&hsio_blk_ctl 0>; > > + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref"; > > assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>, > > <&scmi_clk IMX95_CLK_HSIOPLL>, > > <&scmi_clk IMX95_CLK_HSIOPCIEAUX>; > > @@ -1706,8 +1722,9 @@ pcie1: pcie@4c380000 { > > clocks = <&scmi_clk IMX95_CLK_HSIO>, > > <&scmi_clk IMX95_CLK_HSIOPLL>, > > <&scmi_clk IMX95_CLK_HSIOPLL_VCO>, > > - <&scmi_clk IMX95_CLK_HSIOPCIEAUX>; > > - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux"; > > + <&scmi_clk IMX95_CLK_HSIOPCIEAUX>, > > + <&hsio_blk_ctl 0>; > > + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref"; > > assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>, > > <&scmi_clk IMX95_CLK_HSIOPLL>, > > <&scmi_clk IMX95_CLK_HSIOPCIEAUX>; > > > > > -- > TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany > Amtsgericht München, HRB 105018 > Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider > http://www.tq-group.com/ > >
