On Tue, Feb 25, 2025 at 03:04:06PM +0530, Krishna Chaitanya Chundru wrote: > Qcom PCIe RC controllers are capable of generating 'global' SPI interrupt > to the host CPU. This interrupt can be used by the device driver to handle > PCIe link specific events such as Link up and Link down, which give the > driver a chance to start bus enumeration on its own when link is up and > initiate link training if link goes to a bad state. The PCIe driver can > still work without this interrupt but it will provide a nice user > experience when device gets plugged and removed. > > Hence, document it in the binding along with the existing MSI interrupts. > Global interrupt is parsed as optional in driver, so adding it in bindings > will not break the ABI. > > Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@xxxxxxxxxxxxxxxx> > --- > Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml | 8 +++++--- > 1 file changed, 5 insertions(+), 3 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml > index 76cb9fbfd476..7ae09ba8da60 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml > @@ -54,7 +54,7 @@ properties: > > interrupts: > minItems: 8 > - maxItems: 8 > + maxItems: 9 > > interrupt-names: > items: > @@ -66,6 +66,7 @@ properties: > - const: msi5 > - const: msi6 > - const: msi7 > + - const: global Either context is missing or these are not synced with interrupts. Best regards, Krzysztof
