On Mon, Feb 24, 2025 at 03:28:25PM +0100, Alexander Stein wrote:
> LCDIF port 1 is directly attached to the LVDS Display Bridge (LDB).
> Both need the same clock source (VIDEO_PLL1).
>
> Signed-off-by: Alexander Stein <alexander.stein@xxxxxxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/freescale/imx93.dtsi | 77 ++++++++++++++++++++++++
> 1 file changed, 77 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
> index 56766fdb0b1e5..2628e1e628ec2 100644
> --- a/arch/arm64/boot/dts/freescale/imx93.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
> @@ -1273,6 +1273,9 @@ s4muap: mailbox@47520000 {
> media_blk_ctrl: system-controller@4ac10000 {
> compatible = "fsl,imx93-media-blk-ctrl", "syscon";
> reg = <0x4ac10000 0x10000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
Like the example, this is wrong.
ranges = <0x0 0x4ac10000 0x10000>;
Rob
