On Tue, Feb 25, 2025 at 10:05:10AM +0100, Neil Armstrong wrote:
> In order to support the SM8650 iris33 hardware, we need to provide specific
> reset and constoller power off sequences via the vpu_ops callbacks.
>
> Add those callbacks, and use the current helpers for currently supported
> platforms.
>
> Signed-off-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx>
> ---
> drivers/media/platform/qcom/iris/iris_vpu2.c | 2 ++
> drivers/media/platform/qcom/iris/iris_vpu3.c | 2 ++
> drivers/media/platform/qcom/iris/iris_vpu_common.c | 14 ++++++++++----
> drivers/media/platform/qcom/iris/iris_vpu_common.h | 4 ++++
> 4 files changed, 18 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/media/platform/qcom/iris/iris_vpu2.c b/drivers/media/platform/qcom/iris/iris_vpu2.c
> index 8f502aed43ce2fa6a272a2ce14ff1ca54d3e63a2..093e2068ec35e902f6c7bb3a487a679f9eada39a 100644
> --- a/drivers/media/platform/qcom/iris/iris_vpu2.c
> +++ b/drivers/media/platform/qcom/iris/iris_vpu2.c
> @@ -33,6 +33,8 @@ static u64 iris_vpu2_calc_freq(struct iris_inst *inst, size_t data_size)
> }
>
> const struct vpu_ops iris_vpu2_ops = {
> + .reset_controller = iris_vpu_reset_controller,
> .power_off_hw = iris_vpu_power_off_hw,
> + .power_off_controller = iris_vpu_power_off_controller,
> .calc_freq = iris_vpu2_calc_freq,
> };
> diff --git a/drivers/media/platform/qcom/iris/iris_vpu3.c b/drivers/media/platform/qcom/iris/iris_vpu3.c
> index b484638e6105a69319232f667ee7ae95e3853698..95f362633c95b101ecfda6480c4c0b73416bd00c 100644
> --- a/drivers/media/platform/qcom/iris/iris_vpu3.c
> +++ b/drivers/media/platform/qcom/iris/iris_vpu3.c
> @@ -117,6 +117,8 @@ static u64 iris_vpu3_calculate_frequency(struct iris_inst *inst, size_t data_siz
> }
>
> const struct vpu_ops iris_vpu3_ops = {
> + .reset_controller = iris_vpu_reset_controller,
> .power_off_hw = iris_vpu3_power_off_hardware,
> + .power_off_controller = iris_vpu_power_off_controller,
> .calc_freq = iris_vpu3_calculate_frequency,
> };
> diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.c b/drivers/media/platform/qcom/iris/iris_vpu_common.c
> index fe9896d66848cdcd8c67bd45bbf3b6ce4a01ab10..ec8b10d836d0993bcd722a2bafbb577b85f41fc9 100644
> --- a/drivers/media/platform/qcom/iris/iris_vpu_common.c
> +++ b/drivers/media/platform/qcom/iris/iris_vpu_common.c
> @@ -211,7 +211,7 @@ int iris_vpu_prepare_pc(struct iris_core *core)
> return -EAGAIN;
> }
>
> -static int iris_vpu_power_off_controller(struct iris_core *core)
> +int iris_vpu_power_off_controller(struct iris_core *core)
> {
> u32 val = 0;
> int ret;
> @@ -264,23 +264,29 @@ void iris_vpu_power_off(struct iris_core *core)
> {
> dev_pm_opp_set_rate(core->dev, 0);
> core->iris_platform_data->vpu_ops->power_off_hw(core);
> - iris_vpu_power_off_controller(core);
> + core->iris_platform_data->vpu_ops->power_off_controller(core);
> iris_unset_icc_bw(core);
>
> if (!iris_vpu_watchdog(core, core->intr_status))
> disable_irq_nosync(core->irq);
> }
>
> -static int iris_vpu_power_on_controller(struct iris_core *core)
> +int iris_vpu_reset_controller(struct iris_core *core)
If these functions are platform-specific, please rename them
accordingly, like iris_vpu2_3_foo() or just iris_vpu2_foo().
> {
> u32 rst_tbl_size = core->iris_platform_data->clk_rst_tbl_size;
> +
> + return reset_control_bulk_reset(rst_tbl_size, core->resets);
> +}
> +
> +static int iris_vpu_power_on_controller(struct iris_core *core)
> +{
> int ret;
>
> ret = iris_enable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_CTRL_POWER_DOMAIN]);
> if (ret)
> return ret;
>
> - ret = reset_control_bulk_reset(rst_tbl_size, core->resets);
> + ret = core->iris_platform_data->vpu_ops->reset_controller(core);
> if (ret)
> goto err_disable_power;
>
> diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.h b/drivers/media/platform/qcom/iris/iris_vpu_common.h
> index 63fa1fa5a4989e48aebdb6c7619c140000c0b44c..c948d8b5aee87ccf1fd53c5518a27294232d8fb8 100644
> --- a/drivers/media/platform/qcom/iris/iris_vpu_common.h
> +++ b/drivers/media/platform/qcom/iris/iris_vpu_common.h
> @@ -12,7 +12,9 @@ extern const struct vpu_ops iris_vpu2_ops;
> extern const struct vpu_ops iris_vpu3_ops;
>
> struct vpu_ops {
> + int (*reset_controller)(struct iris_core *core);
> void (*power_off_hw)(struct iris_core *core);
> + int (*power_off_controller)(struct iris_core *core);
> u64 (*calc_freq)(struct iris_inst *inst, size_t data_size);
> };
>
> @@ -21,7 +23,9 @@ void iris_vpu_raise_interrupt(struct iris_core *core);
> void iris_vpu_clear_interrupt(struct iris_core *core);
> int iris_vpu_watchdog(struct iris_core *core, u32 intr_status);
> int iris_vpu_prepare_pc(struct iris_core *core);
> +int iris_vpu_reset_controller(struct iris_core *core);
> int iris_vpu_power_on(struct iris_core *core);
> +int iris_vpu_power_off_controller(struct iris_core *core);
> void iris_vpu_power_off_hw(struct iris_core *core);
> void iris_vpu_power_off(struct iris_core *core);
>
>
> --
> 2.34.1
>
--
With best wishes
Dmitry
