Hi Thomas,
> -----Original Message-----
> From: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> Sent: 12 February 2025 11:12
> Subject: [PATCH v5 00/12] Add Support for RZ/G3E ICU
>
> The ICU block on the RZ/G3E SoC is almost identical to the one found on the RZ/V2H SoC, with the
> following differences:
> - The TINT register base offset is 0x800 instead of zero.
> - The number of supported GPIO interrupts for TINT selection is 141
> instead of 86.
> - The pin index and TINT selection index are not in the 1:1 map
> - The number of TSSR registers is 16 instead of 8
> - Each TSSR register can program 2 TINTs instead of 4 TINTs
>
> Add support for the RZ/G3E ICU driver.
>
> Note:
> The SoC dtsi patch is dropped from series as it is queued for
> renesas-devel.
>
> v4->v5:
> * Collected tags from Geert.
> * Added a new patch for fixing wrong variable usage in
> rzv2h_tint_set_type().
> * Shortened tssr calculation in rzv2h_tint_irq_endisable().
> * Added tssr_shift_factor variable for optimizing the calculation
> in rzv2h_tint_set_type().
> * Dropped unnecessary parenthesis for calculating tssr in
> rzv2h_tint_set_type().
> v3->v4:
> * Updated typo in commit description register offset->register
> base offset.
> * Update typo 15->16 for the number of TSSR registers in RZ/G3E
> * Collected tags.
> * Fixed the typo varable->variable.
> * Started using field_width to handle the SoC differences ad dropped the
> variables tien, tssel_mask,tssel_shift and tssr_k.
> * Dropped RZG3E_* macros from SoC dtsi.
> v2->v3:
> * Added a new patch for cleanup using devm_add_action_or_reset() for
> calling put_device() in error path of rzv2h_icu_init() to simplify
> the code by using recently added devm_*helpers.
> * Replaced 'goto put_dev' by 'return xxx' as put_dev() called by
> devm_add_action_or_reset()
> v1->v2:
> * Collected tags
> * Split the simplification patch into two.
> * Updated commit header and description for patch#4.
> * Replaced devm_reset_control_get_optional_exclusive_deasserted()->
> devm_reset_control_get_exclusive_deasserted().
> * Moved simplification using devm_pm_runtime_enable() to patch#5.
> * Aligned kernel doc, struct members and struct initializers in
> a tabular fashion.
> * Renamed the macro ICU_PB5_TINT->ICU_RZV2H_TSSEL_MAX_VAL.
> * Replaced hexa decimal constant with ICU_RZV2H_TSSEL_MAX_VAL in struct
> rzv2h_hw_params.
> * Introduced ICU_RZG3E_{TSSEL_MAX_VAL,TINT_OFFSET} macros and used these
> macros in struct rzv2h_hw_params rather than using the hex constants.
>
> Biju Das (12):
> dt-bindings: interrupt-controller: renesas,rzv2h-icu: Document RZ/G3E
> SoC
> irqchip/renesas-rzv2h: Fix wrong variable usage in
> rzv2h_tint_set_type()
> irqchip/renesas-rzv2h: Drop irqchip from struct rzv2h_icu_priv
> irqchip/renesas-rzv2h: Simplify rzv2h_icu_init()
> irqchip/renesas-rzv2h: Use
> devm_reset_control_get_exclusive_deasserted()
> irqchip/renesas-rzv2h: Use devm_pm_runtime_enable()
> irqchip/renesas-rzv2h: Add struct rzv2h_hw_info with t_offs variable
> irqchip/renesas-rzv2h: Add max_tssel variable to struct rzv2h_hw_info
> irqchip/renesas-rzv2h: Add field_width variable to struct
> rzv2h_hw_info
> irqchip/renesas-rzv2h: Drop TSSR_TIEN macro
> irqchip/renesas-rzv2h: Drop macros ICU_TSSR_TSSEL_{MASK,PREP}
> irqchip/renesas-rzv2h: Add RZ/G3E support
>
> .../renesas,rzv2h-icu.yaml | 6 +-
> drivers/irqchip/irq-renesas-rzv2h.c | 189 ++++++++++++------
> 2 files changed, 133 insertions(+), 62 deletions(-)
>
Gentle ping. Should I rebase to [1] and resend.
Please let me know.
[1] https://lore.kernel.org/all/20250220150110.738619-5-fabrizio.castro.jz@xxxxxxxxxxx/
Cheers,
Biju
