On 2/22/25 3:19 PM, Shengyu Qu wrote:
Sry I forgot to cc actually.
在 2025/2/22 22:17, Shengyu Qu 写道:
Hi,
Let's continue our discussion here.
Will EMMC speed increase if we only apply patch 1?
no the speed is further limited by the assigned-clock-rates.
Also, about your clock-rates modification in patch 2, I CCed William Qiu
so that we might get some more information about this.
thanks!
Besides I've done a speed test with unlimitied clock-rates and an early
state of SOC clock driver on visionfive 2 when I was working on AXP15060
driver before: http://forum.rvspace.org/t/question-about-sd-card-
speed/1741/21
I believe that looks close to the speeds I was getting when testing,
been while
Best regards,
Shengyu
在 2025/2/22 21:34, Maud Spierings via B4 Relay 写道:
From: Maud Spierings <maud_spierings@xxxxxxxxxxx>
This sdio interface is capable of more than 100 MHz as already
indicated
by the cap_hs200-1_8v attribute. Increase the max-frequency to 200 MHz
so users of this dtsi can increase their SDIO bus speed.
Signed-off-by: Maud Spierings <maud_spierings@xxxxxxxxxxx>
---
arch/riscv/boot/dts/starfive/jh7110-common.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/
riscv/boot/dts/starfive/jh7110-common.dtsi
index
dd2eefc295e5c8b568a02104ec2189e66b378904..19ca8dc24617c2ad565a4a9b2d9af9bd9491f22e
100644
--- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
@@ -258,7 +258,7 @@ &i2c6 {
};
&mmc0 {
- max-frequency = <100000000>;
+ max-frequency = <200000000>;
assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>;
assigned-clock-rates = <50000000>;
bus-width = <8>;
