On Fri, Feb 21, 2025 at 03:50:53PM +0800, Friday Yang wrote: > On the MediaTek platform, some SMI LARBs are directly connected to > the SMI Common, while others are connected to the SMI Sub-Common, > which in turn is connected to the SMI Common. The hardware block > diagram can be described as follows. > > SMI-Common(Smart Multimedia Interface Common) > | > +----------------+------------------+ > | | | > | | | > | | | > | | | > | | | > larb0 SMI-Sub-Common0 SMI-Sub-Common1 > | | | | | > larb1 larb2 larb3 larb7 larb9 > > For previous discussion on the direction of the code modifications, > please refer to: > https://lore.kernel.org/all/CAFGrd9qZhObQXvm2_abqaX83xMLqxjQETB2= > wXpobDWU1CnvkA@xxxxxxxxxxxxxx/ > https://lore.kernel.org/all/CAPDyKFpokXV2gJDgowbixTvOH_5VL3B5H8ey > hP+KJ5Fasm2rFg@xxxxxxxxxxxxxx/ > > On the MediaTek MT8188 SoC platform, we encountered power-off failures > and SMI bus hang issues during camera stress tests. The issue arises > because bus glitches are sometimes produced when MTCMOS powers on or > off. While this is fairly normal, the software must handle these > glitches to avoid mistaking them for transaction signals. What's > more, this issue emerged only after the initial upstreaming of this > binding. Without these patches, the SMI becomes unstable during camera > stress tests. > > The software solutions can be summarized as follows: > > 1. Use CLAMP to disable the SMI sub-common port after turning off the > LARB CG and before turning off the LARB MTCMOS. > 2. Use CLAMP to disable/enable the SMI sub-common port. > 3. Implement an AXI reset for SMI LARBs. > > This patch add '#reset-cells' for the clock controller located in image, > camera and IPE subsystems. > > Signed-off-by: Friday Yang <friday.yang@xxxxxxxxxxxx> Acked-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
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