On Fri, Feb 21, 2025 at 11:14:26AM +0100, Quentin Schulz wrote: > From: Quentin Schulz <quentin.schulz@xxxxxxxxx> > > A few of the I2C GPIO expander chips supported by this binding have a > RESETN pin to be able to reset the chip. The chip is held in reset while > the pin is low, therefore the polarity of reset-gpios is expected to > reflect that, i.e. a GPIO_ACTIVE_HIGH means the GPIO will be driven high > for reset and then driven low, GPIO_ACTIVE_LOW means the GPIO will be > driven low for reset and then driven high. If a GPIO is directly routed > to RESETN pin on the IC without any inverter, GPIO_ACTIVE_LOW is thus > expected. > > Out of the supported chips, only PCA9670, PCA9671, PCA9672 and PCA9673 > show a RESETN pin in their datasheets. They all share the same reset > timings, that is 4+us reset pulse[0] and 100+us reset time[0]. > > When performing a reset, "The PCA9670 registers and I2C-bus state > machine will be held in their default state until the RESET input is > once again HIGH."[1] meaning we now know the state of each line > controlled by the GPIO expander. Therefore, setting lines-initial-states > and reset-gpios both does not make sense and their presence is XOR'ed. > > [0] https://www.nxp.com/docs/en/data-sheet/PCA9670.pdf Fig 22. > [1] https://www.nxp.com/docs/en/data-sheet/PCA9670.pdf 8.5 > > Tested-by: Heiko Stuebner <heiko@xxxxxxxxx> # exclusion logic > Signed-off-by: Quentin Schulz <quentin.schulz@xxxxxxxxx> > --- > .../devicetree/bindings/gpio/nxp,pcf8575.yaml | 38 ++++++++++++++++++++++ > 1 file changed, 38 insertions(+) > > diff --git a/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml b/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml > index 3718103e966a13e1d77f73335ff73c18a3199469..633ac5cfa04a10bcbb748b6580938cddae9e5596 100644 > --- a/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml > +++ b/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml > @@ -73,6 +73,44 @@ properties: > > wakeup-source: true > > + reset-gpios: > + maxItems: 1 > + description: > + GPIO controlling the (reset active LOW) RESET# pin. > + > + The active polarity of the GPIO must translate to the low state > + of the RESET# pin on the IC, i.e. if a GPIO is directly routed > + to the RESET# pin without any inverter, GPIO_ACTIVE_LOW is > + expected. > + > + Performing a reset makes all lines initialized to their input (pulled-up) > + state. > + > +allOf: > + - if: > + properties: > + compatible: > + not: > + contains: > + enum: > + - nxp,pca9670 > + - nxp,pca9671 > + - nxp,pca9672 > + - nxp,pca9673 > + then: > + properties: > + reset-gpios: false > + > + # lines-initial-states XOR reset-gpios > + # Performing a reset reinitializes all lines to a known state which > + # may not match passed lines-initial-states > + - if: > + required: > + - lines-initial-states > + then: > + properties: > + reset-gpios: false > + Acked-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> > patternProperties: > "^(.+-hog(-[0-9]+)?)$": > type: object > > -- > 2.48.1 >
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