Some Allwinner chips (notably the D1s/T113 and the A100) have a "combo MIPI DSI D-PHY" which is required when using single-link LVDS0. The same PD0..PD9 pins are used for either DSI or LVDS. Other than having to use the combo D-PHY, LVDS output is configured in the same way as on older chips. This series enables the sun6i MIPI D-PHY to also work in LVDS mode. It is then configured by the LCD TCON, which allows connecting a single-link LVDS display panel. Kuba Szczodrzyński (5): phy: allwinner: phy-sun6i-mipi-dphy: Support LVDS in combo D-PHY drm/sun4i: Support LVDS using MIPI DSI combo D-PHY drm/sun4i: Enable LVDS output on sun20i D1s/T113 riscv: dts: allwinner: d1s-t113: Add D-PHY to TCON LCD0 riscv: dts: allwinner: d1s-t113: Add LVDS0 pins .../boot/dts/allwinner/sunxi-d1s-t113.dtsi | 10 +++ drivers/gpu/drm/sun4i/sun4i_tcon.c | 40 ++++++++++++ drivers/gpu/drm/sun4i/sun4i_tcon.h | 6 ++ drivers/phy/allwinner/phy-sun6i-mipi-dphy.c | 65 ++++++++++++++++++- 4 files changed, 119 insertions(+), 2 deletions(-) -- 2.25.1
