From: Chen Wang <unicorn_wang@xxxxxxxxxxx> This controller is on the Sophgo SG2042 SoC to transform interrupts from PCIe MSI to PLIC interrupts. Thanks, Chen --- Changes in v4: The patch series is based on v6.14-rc1. Fixed following issues as per comments from Inochi Amaoto, Rob Herring, thanks. - bindings: - Update sequence of "reg-names". - Remove reference to/schemas/interrupts.yaml - Add "#msi-cells". - Improve driver code: - Use fwnode_* instead of of_*. - Some other coding style improvements. Changes in v3: The patch series is based on v6.13-rc7. You can simply review or test the patches at the link [3]. Fixed following issues as per comments from Krzysztof Kozlowski, Samuel Holland, Christophe JAILLET, Inochi Amaoto, thanks. - bindings: use reg for doorbell, fixed wrong usage of additionalProperties and misc. - Improve driver code: - Fixed potentional memory leak issues. - Fixed some build warnings reported by test robot. - Optimize and simplify the code when allocating hwirq. - Use DECLARE_BITMAP instead of kzalloc. - Some other coding style improvements. Changes in v2: The patch series is based on v6.13-rc2. You can simply review or test the patches at the link [2]. Fixed following issues as per comments from Rob Herring, Thomas Gleixner, thanks. - Improve driver binding description, use msi-ranges instread. - Improve driver code: - Improve coding style. - Fixed bug that possible memory leak of bitmap when sg2042_msi_init_domains returns error. - Use guard(mutex). - Use the MSI parent model. Changes in v1: The patch series is based on v6.12-rc7. You can simply review or test the patches at the link [1]. Link: https://lore.kernel.org/linux-riscv/cover.1731296803.git.unicorn_wang@xxxxxxxxxxx/ [1] Link: https://lore.kernel.org/linux-riscv/cover.1733726057.git.unicorn_wang@xxxxxxxxxxx/ [2] Link: https://lore.kernel.org/linux-riscv/cover.1736921549.git.unicorn_wang@xxxxxxxxxxx/ [3] --- Chen Wang (3): dt-bindings: interrupt-controller: Add Sophgo SG2042 MSI irqchip: Add the Sophgo SG2042 MSI interrupt controller riscv: sophgo: dts: add msi controller for SG2042 .../sophgo,sg2042-msi.yaml | 61 ++++ arch/riscv/boot/dts/sophgo/sg2042.dtsi | 10 + drivers/irqchip/Kconfig | 12 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-sg2042-msi.c | 264 ++++++++++++++++++ 5 files changed, 348 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml create mode 100644 drivers/irqchip/irq-sg2042-msi.c base-commit: 2014c95afecee3e76ca4a56956a936e23283f05b -- 2.34.1