Add device-tree binding documentation for the Armada8K reset driver. Signed-off-by: Wilson Ding <dingwei@xxxxxxxxxxx> --- .../reset/marvell,armada8k-reset.yaml | 45 +++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/marvell,armada8k-reset.yaml diff --git a/Documentation/devicetree/bindings/reset/marvell,armada8k-reset.yaml b/Documentation/devicetree/bindings/reset/marvell,armada8k-reset.yaml new file mode 100644 index 000000000000..b9f7f3c24d3c --- /dev/null +++ b/Documentation/devicetree/bindings/reset/marvell,armada8k-reset.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2025 Wilson Ding <dingwei@xxxxxxxxxxx> +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/marvell,armada8k-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Armada8K reset controller + +maintainers: + - Wilson Ding <dingwei@xxxxxxxxxxx> + +description: The reset controller node must be a sub-node of the system + controller node on Armada7K/8K or CN913x SoCs. + +properties: + compatible: + const: marvell,armada8k-reset + + offset: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Offset in the register map for the gpio registers (in bytes) + + "#reset-cells": + const: 1 + +required: + - compatible + - offset + - "#reset-cells" + +additionalProperties: false + +examples: + - | + syscon0: system-controller@440000 { + compatible = "syscon", "simple-mfd"; + reg = <0x440000 0x2000>; + + unit_swrst: reset-controller@268 { + compatible = "marvell,armada8k-reset"; + offset = <0x268>; + #reset-cells = <1>; + }; + }; -- 2.43.0
