Hi Detlev,
all the style nitpick I'd changed myself, but the cpu-supplies did throw me
off, see below.
Am Freitag, 14. Februar 2025, 16:19:34 MEZ schrieb Detlev Casanova:
> diff --git a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
> new file mode 100644
> index 0000000000000..822abb82fae40
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
> @@ -0,0 +1,650 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2024 Radxa Computer (Shenzhen) Co., Ltd.
> + *
empty comment line can probably go away
> + vcc_12v0_dcin: regulator-vcc-12v0-dcin {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc_12v0_dcin";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <12000000>;
> + regulator-max-microvolt = <12000000>;
> + };
> +
> + vcc_5v0_sys: regulator-vcc-5v0-sys {
alphabetical sorting, by node-name please, so
regulator-vcc-3v3* comes before regulator-vcc-5v0* etc
Goes for all regulator-* nodes of course.
> + vcc_3v3_pcie: regulator-vcc-3v3-pcie {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc_3v3_pcie";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + enable-active-high;
> + gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
> + startup-delay-us = <5000>;
> + vin-supply = <&vcc_5v0_sys>;
> + };
> +
> + vcc_5v0_host: regulator-vcc-5v0-host {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc5v0_host";
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + enable-active-high;
> + gpio = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
> + vin-supply = <&vcc_5v0_device>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&usb_host_pwren>;
both of the above, alphabetical sorting of properties please
> + };
> +};
> +
> +&cpu_l0 {
> + cpu-supply = <&vdd_cpu_lit_s0>;
> +};
What happened to the supplies of the other cores?
cpu_l1 - cpu_l3 probably need the same reference as above.
Who is powering the cpu_b* cores?
> +&i2c1 {
> + status = "okay";
> +
> + pmic@23 {
> + compatible = "rockchip,rk806";
> + reg = <0x23>;
> +
> + interrupt-parent = <&gpio0>;
> + interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pmic_pins
> + &rk806_dvs1_null
> + &rk806_dvs2_null
> + &rk806_dvs3_null>;
> +
> + system-power-controller;
> +
> + vcc1-supply = <&vcc_5v0_sys>;
> + vcc2-supply = <&vcc_5v0_sys>;
> + vcc3-supply = <&vcc_5v0_sys>;
> + vcc4-supply = <&vcc_5v0_sys>;
> + vcc5-supply = <&vcc_5v0_sys>;
> + vcc6-supply = <&vcc_5v0_sys>;
> + vcc7-supply = <&vcc_5v0_sys>;
> + vcc8-supply = <&vcc_5v0_sys>;
> + vcc9-supply = <&vcc_5v0_sys>;
> + vcc10-supply = <&vcc_5v0_sys>;
> + vcc11-supply = <&vcc_2v0_pldo_s3>;
> + vcc12-supply = <&vcc_5v0_sys>;
> + vcc13-supply = <&vcc_1v1_nldo_s3>;
> + vcc14-supply = <&vcc_1v1_nldo_s3>;
> + vcca-supply = <&vcc_5v0_sys>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
alphabetical sorting ... gpio* farther up please.
> +&uart0 {
> + pinctrl-0 = <&uart0m0_xfer>;
> + status = "okay";
> +};
> +
> +&combphy1_psu {
> + status = "okay";
> +};
phandles also sorted alphabetical please
> +
> +&u2phy0 {
> + status = "okay";
> +};
> +
> +&u2phy1 {
> + status = "okay";
> +};
> +
> +&usb_drd1_dwc3 {
> + dr_mode = "host";
> + status = "okay";
> +};
Thanks a lot
Heiko
