On Fri 14 Feb 2025 at 10:13, jiebing chen via B4 Relay <devnull+jiebing.chen.amlogic.com@xxxxxxxxxx> wrote: > From: jiebing chen <jiebing.chen@xxxxxxxxxxx> > > add the s4 audio power domain, add the mclk pad, sclk pad > and lrclk pad clock id for s4 Incomplete description of the changes that follows Also the change mixes 2 differents topic for no reason AFAICT. > > Signed-off-by: jiebing chen <jiebing.chen@xxxxxxxxxxx> > --- > .../bindings/clock/amlogic,axg-audio-clkc.yaml | 18 ++++++++++++++++++ > include/dt-bindings/clock/axg-audio-clkc.h | 11 +++++++++++ > 2 files changed, 29 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.yaml > index fd7982dd4ceab82389167079c2258a9acff51a76..364783c6f7572b09d57de2b35d33adb7bcf7db18 100644 > --- a/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.yaml > +++ b/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.yaml > @@ -21,6 +21,7 @@ properties: > - amlogic,axg-audio-clkc > - amlogic,g12a-audio-clkc > - amlogic,sm1-audio-clkc > + - amlogic,s4-audio-clkc > > '#clock-cells': > const: 1 > @@ -100,6 +101,9 @@ properties: > resets: > description: internal reset line > > + power-domains: > + description: audio controller power > + > required: > - compatible > - '#clock-cells' > @@ -116,12 +120,26 @@ allOf: > enum: > - amlogic,g12a-audio-clkc > - amlogic,sm1-audio-clkc > + - amlogic,s4-audio-clkc > then: > required: > - '#reset-cells' > else: > properties: > '#reset-cells': false > + - if: > + properties: > + compatible: > + contains: > + enum: > + - amlogic,s4-audio-clkc > + then: > + required: > + - power-domains > + > + else: > + properties: > + power-domains: false > > additionalProperties: false > > diff --git a/include/dt-bindings/clock/axg-audio-clkc.h b/include/dt-bindings/clock/axg-audio-clkc.h > index 607f23b83fa7287fe0403682ebf827e2df26a1ce..75dde05343d1fa74304ee21c9ec0541a8f51b15e 100644 > --- a/include/dt-bindings/clock/axg-audio-clkc.h > +++ b/include/dt-bindings/clock/axg-audio-clkc.h > @@ -162,5 +162,16 @@ > #define AUD_CLKID_EARCRX_DMAC_SEL 182 > #define AUD_CLKID_EARCRX_DMAC_DIV 183 > #define AUD_CLKID_EARCRX_DMAC 184 > +#define AUD_CLKID_TDM_MCLK_PAD0_SEL 185 > +#define AUD_CLKID_TDM_MCLK_PAD1_SEL 186 > +#define AUD_CLKID_TDM_MCLK_PAD0_DIV 187 > +#define AUD_CLKID_TDM_MCLK_PAD1_DIV 188 > +#define AUD_CLKID_TDM_MCLK_PAD2 189 > +#define AUD_CLKID_TDM_MCLK_PAD2_SEL 190 > +#define AUD_CLKID_TDM_MCLK_PAD2_DIV 191 > +#define AUD_CLKID_TDM_SCLK_PAD3 192 > +#define AUD_CLKID_TDM_SCLK_PAD4 193 > +#define AUD_CLKID_TDM_LRCLK_PAD3 194 > +#define AUD_CLKID_TDM_LRCLK_PAD4 195 I think we've been over the fact that s4 audio clock is very unlikely to be compatible with the axg/g12 generation. I doubt they should share the same bindings ID. > > #endif /* __AXG_AUDIO_CLKC_BINDINGS_H */ -- Jerome
