On 2/13/2025 1:09 AM, Krzysztof Kozlowski wrote:
On 12/02/2025 20:29, Mukesh Kumar Savaliya wrote:
Thanks a lot Rob ! sorry, i was late to respond on this while waiting
for other comments agreements.
On 2/12/2025 3:11 AM, Rob Herring wrote:
On Mon, Feb 10, 2025 at 09:41:28PM +0530, Mukesh Kumar Savaliya wrote:
Thanks Krzysztof !
On 2/9/2025 5:10 PM, Krzysztof Kozlowski wrote:
On 07/02/2025 13:03, Mukesh Kumar Savaliya wrote:
+ gi3c->se.clk = devm_clk_get(&pdev->dev, "se-clk");
+ if (IS_ERR(gi3c->se.clk)) {
+ ret = PTR_ERR(gi3c->se.clk);
+ dev_err(&pdev->dev, "Error getting SE Core clk %d\n", ret);
+ return ret;
+ }
+
+ ret = device_property_read_u32(&pdev->dev, "se-clock-frequency", &gi3c->clk_src_freq);
You never tested your DTS or this code... Drop
I have tested on SM8550 MTP only. Below entry in my internal/local DTSI.
And how is it supposed to work? Are you going to send us your local
internal DTSI? Is it going to pass any checks?
was saying about code was testing with MTP. DTS was tested using dt-bindings
check.
make dtbs_check is how you test.
Sure, we are running "make dt_binding_check
DT_SCHEMA_FILES=qcom,i3c-master.yaml"
Hm? Please read it again. You anyway have it documented in your company
guidebook, so I expect you follow that one *very* carefully because
reviewers repeating the same as your company book and then repeating
themselves three times is just too much.
sorry, i will run what Rob has pointed "make dtbs_check" as it's giving
me exact clarity what to do. I just mentioned what i was doing.
And as you pointed, will follow complete internal guide too if it's
missing dtbs check. Thanks !
Best regards,
Krzysztof
