Blaize BLZP1600 uses the custom silicon provided from
VeriSilicon to add GPIO support.
Signed-off-by: Nikolaos Pasaloukos <nikolaos.pasaloukos@xxxxxxxxxx>
---
arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts | 36 ++++++++++++++++++++++
arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi | 12 ++++++++
2 files changed, 48 insertions(+)
diff --git a/arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts b/arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts
index 7e3cef2ed3522e202487e799b2021cd45398e006..fb5415eb347a028fc65090027a4c4fc89c8280f5 100644
--- a/arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts
+++ b/arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts
@@ -81,3 +81,39 @@ gpio_expander_m2: gpio@75 {
"UART1_TO_RSP"; /* GPIO_15 */
};
};
+
+&gpio0 {
+ status = "okay";
+ gpio-line-names = "PERST_N", /* GPIO_0 */
+ "LM96063_ALERT_N", /* GPIO_1 */
+ "INA3221_PV", /* GPIO_2 */
+ "INA3221_CRIT", /* GPIO_3 */
+ "INA3221_WARN", /* GPIO_4 */
+ "INA3221_TC", /* GPIO_5 */
+ "QSPI0_RST_N", /* GPIO_6 */
+ "LM96063_TCRIT_N", /* GPIO_7 */
+ "DSI_TCH_INT", /* GPIO_8 */
+ "DSI_RST", /* GPIO_9 */
+ "DSI_BL", /* GPIO_10 */
+ "DSI_INT", /* GPIO_11 */
+ "ETH_RST", /* GPIO_12 */
+ "CSI0_RST", /* GPIO_13 */
+ "CSI0_PWDN", /* GPIO_14 */
+ "CSI1_RST", /* GPIO_15 */
+ "CSI1_PWDN", /* GPIO_16 */
+ "CSI2_RST", /* GPIO_17 */
+ "CSI2_PWDN", /* GPIO_18 */
+ "CSI3_RST", /* GPIO_19 */
+ "CSI3_PWDN", /* GPIO_20 */
+ "ADAC_RST", /* GPIO_21 */
+ "SD_SW_VDD", /* GPIO_22 */
+ "SD_PON_VDD", /* GPIO_23 */
+ "GPIO_EXP_INT", /* GPIO_24 */
+ "BOARD_ID_0", /* GPIO_25 */
+ "SDIO1_SW_VDD", /* GPIO_26 */
+ "SDIO1_PON_VDD", /* GPIO_27 */
+ "SDIO2_SW_VDD", /* GPIO_28 */
+ "SDIO2_PON_VDD", /* GPIO_29 */
+ "BOARD_ID_1", /* GPIO_30 */
+ "BOARD_ID_2"; /* GPIO_31 */
+};
diff --git a/arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi b/arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi
index 7d399e6a532f5b24385dd837be965be771c7d24c..7f31e3055f70c1dac798deab073787df83e798d3 100644
--- a/arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi
+++ b/arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi
@@ -120,6 +120,18 @@ gic: interrupt-controller@410000 {
IRQ_TYPE_LEVEL_LOW)>;
};
+ gpio0: gpio@4c0000 {
+ compatible = "vsi,apb-gpio-0.2";
+ reg = <0x4c0000 0x1000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <32>;
+ interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ status = "disabled";
+ };
+
uart0: serial@4d0000 {
compatible = "ns16550a";
reg = <0x4d0000 0x1000>;
--
2.43.0
