On Thu, 6 Feb 2025 at 14:41, Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> Add support for enabling SD on SDHI0 on RZ/G3E SMARC SoM. It is enabled
> by setting the macro SW_SD0_DEV_SEL to 1 in board DTS and setting the
> switch SYS.1 to ON position on the SoM.
>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> ---
> v2->v3:
> * Dropped #if guard in pinctrl node for SDHI0
> * Renamed the label/node sdhi0_pins: sd0->sdhi0_usd_pins: sd0-usd.
> * Dropped overriding regulator name.
> * Updated regulator phandle.
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Queueing in renesas-devel is postponed, pending acceptance of the DT
bindings by the MMC maintainer.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
