On Mon, 03 Feb 2025 15:43:19 +0100, Konrad Dybcio wrote:
> X1P42100 is a(n indirect) derivative of X1E80100 - the silicon is
> actually different and it's not a fused down part.
>
> Introduce the DTS bits required to support it by mostly reusing the
> X1E SoC and CRD DTSIs. The most notable differences from our software
> PoV are a different GPU (support for which will be added later), 4
> less CPUs and some nuances in the PCIe hardware.
>
> [...]
Applied, thanks!
[1/6] dt-bindings: phy: qcom,qmp-pcie: Add X1P42100 PCIe Gen4x4 PHY
commit: 2e1ffd4c180591e6a46c7f94a6bb187a0661141e
[2/6] dt-bindings: phy: qcom,qmp-pcie: Drop reset number constraints
commit: f67f8c61b7fd3f72cf716b3845211e69265d13bd
[3/6] phy: qcom: qmp-pcie: Add X1P42100 Gen4x4 PHY
commit: 0d8db251dd15d2e284f5a6a53bc2b869f3eca711
Best regards,
--
~Vinod
